A hybrid High-Tc superconductor filter/low-noise amplifier microwave integrated circuit.

This paper presents the development of low noise amplifier integrated circuit using 130nm RFCMOS technology. The low noise amplifier function is to amplify extremely low noise amplifier without adding noise and preserving required signal to a noise ratio. A detailed methodology and analysis that leads to a low power LNA are being discussed throughout this paper. Inductively degenerated and Gm-boosted topology are used to design the circuit. Design specifications are focused for 802.11b/g/n IEEE Wireless LAN Standards with center frequency of 2.4 GHz. The best low noise amplifier provides a power gain (S21) of 19.841 dB with noise figure (NF) of 1.497 dB using the gm-boosted topology while the best low power amplifier drawing 4.19mW power from a 1.2V voltage supply using the inductively degenerated.

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243 GHz low-noise amplifier MMICs and modules based on metamorphic HEMT technology

International Journal of Microwave and Wireless Technologies ◽

10.1017/s1759078714000166 ◽

2014 ◽

Vol 6 (3-4) ◽

pp. 215-223 ◽

Cited By ~ 12

Author(s):

Axel Tessmann ◽

Volker Hurm ◽

Arnulf Leuther ◽

Hermann Massler ◽

Rainer Weber ◽

...

Keyword(s):

Integrated Circuit ◽

Noise Figure ◽

Coplanar Waveguide ◽

High Electron Mobility Transistors ◽

Low Noise ◽

Low Noise Amplifier ◽

High Electron ◽

Monolithic Integrated Circuit ◽

Electron Mobility Transistors ◽

Noise Amplifier

Two compact H-band (220–325 GHz) low-noise millimeter-wave monolithic integrated circuit (MMIC) amplifiers have been developed, based on a grounded coplanar waveguide (GCPW) technology utilizing 50 and 35 nm metamorphic high electron mobility transistors (mHEMTs). For low-loss packaging of the circuits, a set of waveguide-to-microstrip transitions has been realized on 50-μm-thick GaAs substrates demonstrating an insertion loss of <0.5 dB at 243 GHz. By applying the 50 nm gate-length process, a four-stage cascode amplifier module achieved a small-signal gain of 30.6 dB at 243 GHz and more than 28 dB in the bandwidth from 218 to 280 GHz. A second amplifier module, based on the 35-nm mHEMT technology, demonstrated a considerably improved gain of 34.6 dB at 243 GHz and more than 32 dB between 210 and 280 GHz. At the operating frequency, the two broadband low-noise amplifier modules achieved a room temperature noise figure of 5.6 dB (50 nm) and 5.0 dB (35 nm), respectively.

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Ultrahigh Frequency Ultrasonic Transducers Design with Low Noise Amplifier Integrated Circuit

Micromachines ◽

10.3390/mi9100515 ◽

2018 ◽

Vol 9 (10) ◽

pp. 515 ◽

Cited By ~ 1

Author(s):

Di Li ◽

Chunlong Fei ◽

Qidong Zhang ◽

Yani Li ◽

Yintang Yang ◽

...

Keyword(s):

Integrated Circuit ◽

Low Noise ◽

Low Noise Amplifier ◽

Ultrasonic Transducers ◽

Oxide Semiconductor ◽

Ultrahigh Frequency ◽

Common Source ◽

Echo Signal ◽

Silicon Lens ◽

Noise Amplifier

This paper describes the design of an ultrahigh frequency ultrasound system combined with tightly focused 500 MHz ultrasonic transducers and high frequency wideband low noise amplifier (LNA) integrated circuit (IC) model design. The ultrasonic transducers are designed using Aluminum nitride (AlN) piezoelectric thin film as the piezoelectric element and using silicon lens for focusing. The fabrication and characterization of silicon lens was presented in detail. Finite element simulation was used for transducer design and evaluation. A custom designed LNA circuit is presented for amplifying the ultrasound echo signal with low noise. A Common-source and Common-gate (CS-CG) combination structure with active feedback is adopted for the LNA design so that high gain and wideband performances can be achieved simultaneously. Noise and distortion cancelation mechanisms are also employed in this work to improve the noise figure (NF) and linearity. Designed by using a 0.35 μm complementary metal oxide semiconductor (CMOS) technology, the simulated power gain of the echo signal wideband amplifier is 22.5 dB at 500 MHz with a capacitance load of 1.0 pF. The simulated NF at 500 MHz is 3.62 dB.

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Cascode Monolithic Integrated Circuit of a Low-Noise Amplifier in the Frequency Range of 8-12 GHz on a Gallium Nitride Nanoheterostructure

Nano- i Mikrosistemnaya Tehnika ◽

10.17587/nmst.22.98-102 ◽

2020 ◽

Vol 22 (2) ◽

pp. 98-102

Author(s):

S.A. Gamkrelidze ◽

◽

P.P. Maltsev ◽

Y.V. Fedorov ◽

D.L. Gnatyuk ◽

...

Keyword(s):

Gallium Nitride ◽

Integrated Circuit ◽

Low Noise ◽

Low Noise Amplifier ◽

Frequency Range ◽

Monolithic Integrated Circuit ◽

Noise Amplifier

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Linearity improvement of differential CMOS low noise amplifier

Indonesian Journal of Electrical Engineering and Computer Science ◽

10.11591/ijeecs.v14.i1.pp407-412 ◽

2019 ◽

Vol 14 (1) ◽

pp. 407

Author(s):

Maizan Muhamad ◽

Norhayati Soin ◽

Harikrishnan Ramiah

Keyword(s):

Integrated Circuit ◽

Wireless Lan ◽

Noise Figure ◽

Supply Voltage ◽

Cmos Technology ◽

Low Noise ◽

Low Noise Amplifier ◽

Common Source ◽

Linearity Improvement ◽

Noise Amplifier

This paper presents the linearity improvement of differential CMOS low noise amplifier integrated circuit using 0.13um CMOS technology. In this study, inductively degenerated common source topology is adopted for wireless LAN application. The linearity of the single-ended LNA was improved by using differential structures with optimum biasing technique. This technique achieved better LNA and linearity performance compare with single-ended structure. Simulation was made by using the cadence spectre RF tool. Consuming 5.8mA current at 1.2V supply voltage, the designed LNA exhibits S21 gain of 18.56 dB, noise figure (NF) of 1.85 dB, S11 of −27.63 dB, S22 of -34.33 dB, S12 of −37.09 dB and IIP3 of -7.79 dBm.

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