Enhanced Diffusion of Impurities in Silicon during Rapid Thermal Annealing (Computer Simulation)

1991 ◽  
Vol 125 (2) ◽  
pp. K71-K75 ◽  
Author(s):  
L. N. Aleksandrov ◽  
T. V. Bondareva
1999 ◽  
Vol 568 ◽  
Author(s):  
Aditya Agarwal ◽  
Hans-J. Gossmann ◽  
Anthony T. Fiory

ABSTRACTOver the last couple of years rapid thermal annealing (RTA) equipment suppliers have been aggressively developing lamp-based furnaces capable of achieving ramp-up rates on the order of hundreds of degrees per second. One of the driving forces for adopting such a strategy was the experimental demonstration of 30nm p-type junctions by employing a ramp-up rate of ≈400°C/s. It was subsequently proposed that the ultra-fast temperature ramp-up was suppressing transient enhanced diffusion (TED) of boron which results from the interaction of the implantation damage with the dopant. The capability to achieve very high temperature ramp-rates was thus embraced as an essential requirement of the next generation of RTA equipment.In this paper, recent experimental data examining the effect of the ramp-up rate during spike-and soak-anneals on enhanced diffusion and shallow junction formation is reviewed. The advantage of increasing the ramp-up rate is found to be largest for the shallowest, 0.5-keV, B implants. At such ultra-low energies (ULE) the advantage arises from a reduction of the total thermal budget. Simulations reveal that a point of diminishing return is quickly reached when increasing the ramp-up rate since the ramp-down rate is in practice limited. At energies where TED dominates, a high ramp-up rate is only effective in minimizing diffusion if the implanted dose is sufficiently small so that the TED can be run out during the ramp-up portion of the anneal; for larger doses, a high ramp-up rate only serves to postpone the TED to the ramp-down duration of the anneal. However, even when TED is minimized at higher implant energies via high ramp-up rates, the advantage is unobservable due to the rather large as-implanted depth. It appears then that while spike anneals allow the activation of ULE-implanted dopants to be maximized while minimizing their diffusion the limitation imposed by the ramp-down rate compromises the advantage of very aggressive ramp-up rates.


1998 ◽  
Vol 37 (Part 1, No. 3B) ◽  
pp. 1054-1058 ◽  
Author(s):  
Yukio Nishida ◽  
Hirokazu Sayama ◽  
Satoshi Shimizu ◽  
Takashi Kuroi ◽  
Akihiko Furukawa ◽  
...  

1984 ◽  
Vol 35 ◽  
Author(s):  
T.E. Seidel ◽  
C.S. Pai ◽  
D.J. Lischner ◽  
D.M. Maher ◽  
R.V. Knoell ◽  
...  

ABSTRACTCertain aspects of Rapid Thermal Annealing (RTA) are reviewed. Temperature considerations are discussed. The implant disorder removal rate is measured (5eV removal energy for As induced damage). Shallower defect-free junctions are obtained using RTA. Results of a ”Round Robin”-RTA annealing are presented, transient enhanced diffusion is not prominent for As. New results for the concentration enhanced diffusion of As are presented. Diffusion from the channeling-tai1 region of shallow boron diffusions is noted as a limiting factor for producing shallow p+-junctions. Other issues are briefly discussed.


1988 ◽  
Vol 110 (2) ◽  
pp. K61-K65 ◽  
Author(s):  
O. V. Aleksandrov ◽  
V. V. Kozlovskii ◽  
V. V. Popov ◽  
B. E. Samorukov

1990 ◽  
Vol 209 ◽  
Author(s):  
Guanqun Xia ◽  
Anmin Guan ◽  
Haiyang Geng ◽  
Weiyuan Wang

ABSTRACTThe electrical properties of S+ implanted in SI GaAs have been studied. The rapid diffusion and redistribution of S+ implanted in GaAs after conventional thermal annealing (CTA) depends not on conventional diffusion of S+ or VAs, but on the enhanced diffusion by ion implantation. By employing rapid thermal annealing (RTA) techniques enhanced diffusion can be restrained, redistribution of S+ implantation can be decreased greatly and a thin active layer suitable for fabricating GaAs MESFET devices can be obtained.


1988 ◽  
pp. 697-702
Author(s):  
O. V. Aleksandrov ◽  
V. V. Kozlovskii ◽  
V. V. Popov ◽  
B. E. Samorukov

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