Semantic Desktop: A Common Gate on Local and Distributed Indexed Resources

2010 ◽  
pp. 61-76
Author(s):  
Claude Moulin ◽  
Cristian Lai
Keyword(s):  
Common Gate

scholarly journals Analysis and design of common-gate low-noise amplifier for wideband applications

2009 ◽  
Vol 37 (2) ◽  
pp. 257-281 ◽  
Author(s):  
Jouni Kaukovuori ◽  
Mikko Kaltiokallio ◽  
Jussi Ryynänen
Keyword(s):  
Low Noise ◽  
Low Noise Amplifier ◽  
Analysis And Design ◽  
Common Gate ◽  
Noise Amplifier

scholarly journals Highly linear Post Distortion Cancellation common-gate Gilbert-mixer in Ku-band

2011 ◽  
Vol 8 (13) ◽  
pp. 1014-1021 ◽  
Author(s):  
Hedieh Elyasi ◽  
Abdolreza Nabavi
Keyword(s):  
Common Gate ◽  
Ku Band

scholarly journals Protons, Heat, and Mechanical Force Act Through a Common Gate to Control K2P Channel Function

2011 ◽  
Vol 100 (3) ◽  
pp. 348a
Author(s):  
Sviatoslav Bagriantsev ◽  
Rémi Peyronnet ◽  
Kimberly Clark ◽  
Eric Honoré ◽  
Daniel L. Minor
Keyword(s):  
Mechanical Force ◽  
K2p Channel ◽  
Channel Function ◽  
Common Gate

Design of 3.1-10.6GHz CMOS LNA Based on Input Matching Technique of Common-Gate Topology

2013 ◽  
Vol 479-480 ◽  
pp. 1014-1017
Author(s):  
Yi Cheng Chang ◽  
Meng Ting Hsu ◽  
Yu Chang Hsieh
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Average Power ◽  
Wide Band ◽  
Low Noise ◽  
Input Matching ◽  
Common Gate ◽  
Cmos Lna ◽  
Noise Amplifier ◽  
Is Design

In this study, three stage ultra-wide-band CMOS low-noise amplifier (LNA) is presented. The UWB LNA is design in 0.18μm TSMC CMOS technique. The LNA input and output return loss are both less than-10dB, and achieved 10dB of average power gain, the minimum noise figure is 6.55dB, IIP3 is about-9.5dBm. It consumes 11mW from a 1.0-V supply voltage.

scholarly journals A 2.4 GHz low noise amplifier design at 130nm CMOS technology using common gate topology for WiFi / WiMAX application

2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar
Keyword(s):  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Low Power Consumption ◽  
Common Gate ◽  
Chip Size ◽  
Overall Performance ◽  
Amplifier Design ◽  
Noise Amplifier

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.

scholarly journals Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation

2009 ◽  
Vol 6 (6) ◽  
pp. 310-316 ◽  
Author(s):  
Mahdi Parvizi ◽  
Abdolreza Nabavi
Keyword(s):  
Third Order ◽  
Common Gate

scholarly journals A Novel Reconfigurable MB-OFDM UWB LNA Using Programmable Current Reuse

2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
Ahmed Ragheb ◽  
Ghazal Fahmy ◽  
Iman Ashour ◽  
Abdel Hady Ammar
Keyword(s):  
Orthogonal Frequency Division Multiplexing ◽  
Cmos Technology ◽  
Low Noise ◽  
Ultra Wideband ◽  
Current Reuse ◽  
Input Matching ◽  
Common Gate ◽  
Programmable Circuit ◽  
Noise Amplifier ◽  
Mode 3

This paper presents a design of a reconfigurable low noise amplifier (LNA) for multiband orthogonal frequency division multiplexing (MB-OFDM) ultra wideband (UWB) receivers. The proposed design is divided into three stages; the first one is a common gate (CG) topology to provide the input matching over a wideband. The second stage is a programmable circuit to control the mode of operation. The third stage is a current reuse topology to improve the gain, flatness and consume lower power. The proposed LNA is designed using 0.18 μm CMOS technology. This LNA has been designed to operate in two subbands of MB-OFDM UWB, UWB mode-1 and mode-3, as a single or concurrent mode. The simulation results exhibit the power gain up to 17.35, 18, and 11 dB for mode-1, mode-3, and concurrent mode, respectively. The NF is 3.5, 3.9, and 6.5 and the input return loss is better than −12, −13.57, and −11 dB over mode-1, mode-3, and concurrent mode, respectively. This design consumes 4 mW supplied from 1.2 V.

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