Low-Power Deep-Submicron CMOS Adder Using Optimized Delay Universal Gates

2021 ◽  
pp. 531-549
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Reeba Korah ◽  
G. Maria Kalavathy
Keyword(s):  
Low Power ◽  
Deep Submicron ◽  
Submicron Cmos ◽  
Universal Gates

Deep-submicron CMOS technologies for low-power and high-performance operation

1996 ◽  
Vol 79 (11) ◽  
pp. 1-9 ◽  
Author(s):  
Manabu Deura ◽  
Yasuo Nara ◽  
Tatsuya Yamazaki ◽  
Kenichi Gotoh ◽  
Fumio Ohtake ◽  
...  
Keyword(s):  
Low Power ◽  
High Performance ◽  
Deep Submicron ◽  
Submicron Cmos

Deep Submicron CMOS Technology Using Top-Edge Round STI and Dual Gate Oxide for Low Power 256 M-Bit Mobile DRAM

2003 ◽  
Vol 42 (Part 1, No. 4B) ◽  
pp. 1892-1896 ◽  
Author(s):  
Chihoon Lee ◽  
Donggun Park ◽  
Namhyuk Jo ◽  
Chanseong Hwang ◽  
Hyeong Joon Kim ◽  
...  
Keyword(s):  
Low Power ◽  
Gate Oxide ◽  
Cmos Technology ◽  
Deep Submicron ◽  
Dual Gate ◽  
Submicron Cmos

Performance and reliability aspects of FOND: a new deep submicron CMOS device concept

1996 ◽  
Vol 43 (9) ◽  
pp. 1407-1415 ◽  
Author(s):  
R. Bellens ◽  
G. Van den Bosch ◽  
P. Habas ◽  
J.-P. Mieville ◽  
G. Badenes ◽  
...  
Keyword(s):  
Deep Submicron ◽  
Submicron Cmos
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