scholarly journals Correction to: New surface microstructure of mono-si wafer textured using wet chemical solutions for solar cell

2019 ◽  
Vol 125 (7) ◽  
Author(s):  
Xiao Tong Gong ◽  
Shi Meng Feng ◽  
Gang Lei ◽  
Meng Qi Shi
Keyword(s):  
Solar Cell ◽  
Surface Microstructure ◽  
Chemical Solutions ◽  
Wet Chemical ◽  
Si Wafer

scholarly journals Rapid Processing of Wafer-Scale Anti-Reflecting 3D Hierarchical Structures on Silicon and Its Templation

Materials ◽  
2018 ◽  
Vol 11 (12) ◽  
pp. 2586 ◽  
Author(s):  
Harsimran Singh Bindra ◽  
Jaikrishna R. ◽  
Tushar Kumeria ◽  
Ranu Nayak
Keyword(s):  
Surface Texturing ◽  
Hierarchical Structures ◽  
Metal Nanoparticle ◽  
Nano Structures ◽  
Wet Anisotropic Etching ◽  
Wet Chemical ◽  
Rapid Processing ◽  
Si Wafer ◽  
Unique Surface ◽  
Nanoparticle Catalyst

Hierarchically structured silicon (Si) surfaces with a combination of micro/nano-structures are highly explored for their unique surface and optical properties. In this context, we propose a rapid and facile electroless method to realize hierarchical structures on an entire Si wafer of 3″ diameter. The overall process takes only 65 s to complete, unlike any conventional wet chemical approach that often combines a wet anisotropic etching of (100) Si followed by a metal nanoparticle catalyst etching. Hierarchical surface texturing on Si demonstrates a broadband highly reduced reflectance with average R% ~ 2.7% within 300–1400 nm wavelength. The as-fabricated hierarchical structured Si was also templated on a thin transparent layer of Polydimethylsiloxane (PDMS) that further demonstrated prospects for improved solar encapsulation with high optical clarity and low reflectance (90% and 2.8%).

Minority Carrier Diffusion Length Improvement in Czochralski Silicon by Aluminum Gettering

1995 ◽  
Vol 378 ◽  
Author(s):  
Subhash M. Joshi ◽  
Ylrich M. GÖsele ◽  
Teh Y. Tan
Keyword(s):  
Solar Cell ◽  
Integrated Circuits ◽  
Minority Carrier ◽  
Minority Carrier Diffusion Length ◽  
Carrier Diffusion ◽  
Solar Cell Efficiency ◽  
Czochralski Silicon ◽  
Si Substrates ◽  
Cell Efficiency ◽  
Si Wafer

AbstractGettering is widely used for fabricating integrated circuits using Si substrates, and has great potential for solar cell fabrications as well. Recently available solar cell efficiency studies have shown the benefits of the wafer backside Al, attributable to effects of gettering, a wafer backside field, and passivation of grain boundaries and dislocations. In this paper, we report experimental results which showed unambiguously that Czochralski Si wafer bulk minority carrier diffusion lengths can be significantly improved due to gettering of impurities by wafer backside Al, which also provided a protection from environmental contamination.

scholarly journals Investigation on the Electrical Characteristics of mc-Si Wafer and Solar Cell with a Textured Surface by RIE

2011 ◽  
Vol 20 (3) ◽  
pp. 225-232 ◽  
Author(s):  
Kwang-Mook Park ◽  
Jee-Hee Jung ◽  
So-Ik Bae ◽  
Si-Young Choi ◽  
Myoung-Bok Lee
Keyword(s):  
Solar Cell ◽  
Textured Surface ◽  
Electrical Characteristics ◽  
Si Wafer

Wet-Chemical Conditioning of H-Terminated Silicon Solar Cell Substrates Investigated by Surface Photovoltage Measurements

2012 ◽  
Vol 195 ◽  
pp. 301-304 ◽  
Author(s):  
Heike Angermann ◽  
U. Stürzebecher ◽  
J. Kegel ◽  
C. Gottschalk ◽  
K. Wolke ◽  
...  
Keyword(s):  
Solar Cell ◽  
Silicon Solar Cell ◽  
Energy Conversion Efficiency ◽  
Charge Carriers ◽  
Surface Charges ◽  
Surfaces And Interfaces ◽  
Wet Chemical ◽  
Substrate Surfaces ◽  
Non Destructive

For further enhancement of solar energy conversion efficiency the passivation of silicon (Si) substrate surfaces and interfaces of Si-based solar cell devices is a decisive precondition to reduce recombination losses of photogenerated charge carriers. These losses are mainly controlled by surface charges, the density and the character of rechargeable interface states (Dit) [], which are induced by defects localised in a small interlayer extending over only few Å. Therefore, the application of fast non-destructive methods for characterization of the electronic interface properties directly during the technological process has received an increasing interest in recent years.

Cleaning of III-V Materials: Surface Chemistry Considerations

2012 ◽  
Vol 195 ◽  
pp. 98-99 ◽  
Author(s):  
Dennis H. van Dorp ◽  
Daniel Cuypers ◽  
Sophia Arnauts ◽  
Paul W. Mertens ◽  
Stefan de Gendt
Keyword(s):  
Charge Carrier ◽  
Surface Chemistry ◽  
Carrier Mobility ◽  
Compound Semiconductors ◽  
Charge Carrier Mobility ◽  
Group Iii ◽  
Acidic Solutions ◽  
Chemical Solutions ◽  
Wet Chemical ◽  
High Charge Carrier Mobility

Compound semiconductors based on group III and V elements of the periodic system have high charge carrier mobility and are, therefore, candidates for channel material in future CMOS devices [1]. In order to design wet chemical solutions that lead to appropriate surface pre-conditioning and allow for nanoscale processing and minimal substrate loss, a thorough understanding of the interactions between the substrate and the chemical solutions is needed and the basic etching mechanisms needs to be resolved. The focus of this research is on InP in acidic solutions. ESH aspects are also considered.

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