Nanocrystalline silicon thin-film transistors with 50-nm-thick deposited channel layer, 10 cm 2 V -1 s -1 electron mobility and 10 8 on/off current ratio

AbstractWe report on directly deposited plasma-enhanced chemical vapor deposition (PECVD) nanocrystalline silicon (nc-Si:H) ambipolar thin-film transistors (TFTs) fabricated at 260 °C. The ambipolar operation is achieved adopting Cr metal contacts with high-quality nc-Si:H channel layer, which creates highly conductive Cr silicided drain/source contacts, reducing both electron and hole injection barriers. The n-channel nc-Si:H TFTs show a field-effect electron mobility (meFE) of 150 cm2/Vs, threshold voltage (VT) ~ 2 V, subthreshold slope (S) ~0.3 V/dec, and ON/OFF current ratio of more than 107, while the p-channel nc-Si:H TFTs show a field-effect hole mobility (mhFE) of 26 cm2/Vs, VT ~ -3.8 V, S ~0.25 V/dec, and ON/OFF current ratio of more than 106. Complementary metal-oxide-semiconductor (CMOS) logic integrated with two ambipolar nc-Si:H TFTs shows reasonable transfer characteristics. The results presented here demonstrate that low-temperature nc-Si:H TFT technology is feasible for total integration of active-matrix TFT backplanes.

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Electromechanical Stability of Flexible Nanocrystalline-Silicon Thin-Film Transistors

IEEE Electron Device Letters ◽

10.1109/led.2009.2039023 ◽

2010 ◽

Vol 31 (3) ◽

pp. 222-224 ◽

Cited By ~ 3

Author(s):

I-Chung Chiu ◽

Jung-Jie Huang ◽

Yung-Pei Chen ◽

I-Chun Cheng ◽

J.Z. Chen ◽

...

Keyword(s):

Thin Film ◽

Thin Film Transistors ◽

Nanocrystalline Silicon ◽

Silicon Thin Film

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High mobility, bottom gate, nanocrystalline silicon thin film transistors incorporating a nitrogenated incubation layer

Current Applied Physics ◽

10.1016/j.cap.2010.07.001 ◽

2011 ◽

Vol 11 (2) ◽

pp. 171-175 ◽

Cited By ~ 5

Author(s):

I.Y.Y. Bu ◽

A.J. Flewitt ◽

W.I. Milne

Keyword(s):

Thin Film ◽

Thin Film Transistors ◽

High Mobility ◽

Nanocrystalline Silicon ◽

Silicon Thin Film ◽

Bottom Gate

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Self-Aligned Top-Gate Nanocrystalline Silicon Thin-Film Transistors with Source/Drain Regions Activated by Diode-Pumped Continuous-Wave Green Laser

10.7567/ssdm.2008.h-1-3 ◽

2008 ◽

Author(s):

W. Sato ◽

A. Hara ◽

S. Kurauchi ◽

Y. Doi ◽

M. Kobata ◽

...

Keyword(s):

Thin Film ◽

Thin Film Transistors ◽

Continuous Wave ◽

Nanocrystalline Silicon ◽

Green Laser ◽

Silicon Thin Film ◽

Diode Pumped

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Hydrogen in Ultralow Temperature SiO2for Nanocrystalline Silicon Thin Film Transistors

MRS Proceedings ◽

10.1557/proc-814-i10.14 ◽

2004 ◽

Vol 814 ◽

Cited By ~ 1

Author(s):

Alex Kattamis ◽

I-Chun Cheng ◽

Steve Allen ◽

Sigurd Wagner

Keyword(s):

Thin Film ◽

Leakage Current ◽

Current Density ◽

Thin Film Transistors ◽

Secondary Ion Mass Spectrometry ◽

Crystalline Silicon ◽

Chemical Vapor ◽

Nanocrystalline Silicon ◽

Film Deposition ◽

Silicon Thin Film

AbstractNanocrystalline silicon is a candidate material for fabricating thin film transistors with high carrier mobilities on plastic substrates. A major issue in the processing of nanocrystalline silicon thin film transistors (nc-Si:H TFTs) at ultralow temperatures is the quality of the SiO2gate dielectric. SiO2deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (rf-PECVD), and not annealed at high temperature after deposition, exhibits high leakage current and voltage shifts when incorporated into TFT's. Secondary ion mass spectrometry (SIMS) measurements show that the hydrogen concentration (NH) in PECVD oxide deposited at 150°C on crystalline silicon (x-Si) is ∼ 0.8 at. %. This is much higher than in thermal oxides on x-Si, which display concentrations of less than 0.003 at. %. The leakage current density for thermal oxides on x-Si at a bias of 10 V is ∼9×10−6A/cm2whereas for 200°C PECVD oxides on nc-Si:H the current is ∼1×10−4A/cm2. As the temperature of the SiO2deposition is reduced to 150°C the current density rises by up to two orders of magnitude more. The H which is suspected to cause the leakage current across the PECVD oxide originates from the nc-Si:H substrate and the SiH4source gas. We analyzed the 300-nm gate oxide in capacitor structures of Al / SiO2/n+nc-Si:H / Cr / glass, Al / SiO2/ n+nc-Si:H / x-Si, and Al / SiO2/ x-Si. Vacuum annealing the nc-Si:H prior to PECVD of the oxide drives H out of the nc-Si:H film and reduces the amount of H incorporated into the oxide that is deposited on top. SiO2film deposition from SiH4and N2O at high He dilution has a still greater effect on lowering NH. The leakage current at a 10 V bias dropped from ∼1×10−4A/cm2to about ∼2×10−6A/cm2using He dilution at 250°C, and the vacuum anneal of the nc-Si:H lowered it by an additional factor of two. Thus we observe that both the nc-Si:H anneal and the SiO2deposition at high He dilution lessen the gate leakage current.

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