Modeling and designing of high-gain, wide-band and fast-speed operational transconductance amplifier

2011 ◽  
Vol 71 (2) ◽  
pp. 255-263 ◽  
Author(s):  
Jin Wu ◽  
Ma Ke ◽  
Ning Qu ◽  
Weiwei Zhang
Keyword(s):  
Wide Band ◽  
High Gain ◽  
Operational Transconductance Amplifier ◽  
Fast Speed ◽  
Transconductance Amplifier

Design of High Gain Folded Cascode OTA-Based Transconductance–Capacitance Loop Filter for PLL Applications

2021 ◽  
pp. 2150263
Author(s):  
Priti Gupta ◽  
Sanjay Kumar Jana
Keyword(s):  
Power Consumption ◽  
Supply Voltage ◽  
High Gain ◽  
Cmos Process ◽  
Operational Transconductance Amplifier ◽  
Loop Filter ◽  
Transconductance Amplifier ◽  
Dc Gain ◽  
Unity Gain ◽  
Folded Cascode

This paper deals with the designing of low-power transconductance–capacitance-based loop filter. The folded cascode-based operational transconductance amplifier (OTA) is designed in this paper with the help of quasi-floating bulk MOSFET that achieved the DC gain of 88.61[Formula: see text]dB, unity gain frequency of 97.86[Formula: see text]MHz and power consumption of 430.62[Formula: see text][Formula: see text]W. The proposed OTA is compared with the exiting OTA structure which showed 19.50% increase in DC gain and 15.11% reduction in power consumption. Further, the proposed OTA is used for the designing of transconductance–capacitance-based loop filter that has been operated at [Formula: see text]3[Formula: see text]dB cut-off frequency of 30.12[Formula: see text]MHz with the power consumption of 860.90[Formula: see text][Formula: see text]W at the supply voltage of [Formula: see text][Formula: see text]V. The transistor-level simulation has been done in 0.18[Formula: see text][Formula: see text]m CMOS process.

scholarly journals Design of Low Voltage Low Power High Gain Operational Transconductance Amplifier

2021 ◽  
Vol 7 (4) ◽  
pp. 103-110
Author(s):  
Rajesh Durgam ◽  
S. Tamil ◽  
Nikhil Raj
Keyword(s):  
Low Voltage ◽  
Cmos Technology ◽  
High Gain ◽  
Floating Gate ◽  
Operational Transconductance Amplifier ◽  
Linear Mode ◽  
Low Voltage Operation ◽  
Transconductance Amplifier ◽  
Amplifier Design ◽  
Self Cascode

In this paper, a high gain structure of operational transconductance amplifier is presented. For low voltage operation with improved frequency response bulk driven quasi-floating gate MOSFET is used at the input. Further for achieving high gain the modified self cascode structure is used at the output. Compared to conventional self cascode the modified self cascode structure used provides higher transconductance which helps in significant boosting of gain of the amplifier. The modification is achieved by employing quasi-floating gate transistor which helps in scaling of the threshold which as a result increases the drain-to-source voltage of linear mode transistor thus changing it to saturation. This change of mode boosts the effective transconductance of self cascode MOSFET. The proposed operational transconductance amplifier when compared to its conventional showed improvement in DC gain by 30dB and also the unity gain bandwidth increases by 6 fold. The MOS models used for amplifier design are of 0.18µm CMOS technology at supply of 0.5V.

A Low-Noise High-Gain Recycling Folded Cascode Operational Transconductance Amplifier Based on Gate Driven and Quasi-Floating Bulk Technique

2021 ◽  
Author(s):  
Roowz Saini ◽  
Kulbhushan Sharma ◽  
Rajnish Sharma
Keyword(s):  
Power Consumption ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Monte Carlo Analysis ◽  
High Gain ◽  
Low Noise ◽  
Operational Transconductance Amplifier ◽  
Sensor Applications ◽  
Transconductance Amplifier ◽  
Folded Cascode

Operational Transconductance Amplifier (OTA) is an important circuit block used in the design of filter, amplifiers and oscillators for various analog-mixed circuit systems. However, design of a low-noise, high-gain OTA with low-power consumption is a challenging task in CMOS technology owing to high-power requirements of OTA for emulating high gain. This paper represents the design of gate-driven quasi-floating bulk recycling folded cascode (GDQFB RFC) OTA which has been shown to provide low-noise operation, emulates high gain and draws very less power. The design utilizes the gate-driven quasi-floating bulk (GDQFB) technique on a recycling folded cascode structure, which enhances the transconductance of OTA and improves its performance. All the post-layout simulation results have been obtained in 0.18-[Formula: see text]m CMOS N-well technology using BSIM3V3 device models. The obtained results indicate very high gain of 100.4 dB, gain-bandwidth of 69[Formula: see text]kHz, phase margin of 51.9∘ with power consumption of 2.31[Formula: see text][Formula: see text]W from [Formula: see text][Formula: see text]V supply voltage. The input referred noise emulated by proposed OTA is 0.684, 0.21 and 0.0592[Formula: see text][Formula: see text]V/[Formula: see text]Hz @ 1[Formula: see text]Hz, 10[Formula: see text]Hz and 1[Formula: see text]kHz, respectively. The input common mode range and output voltage swing are found to be [Formula: see text] to 0.669[Formula: see text]V and [Formula: see text] to 0.610[Formula: see text]V, respectively. Corner simulations and Monte Carlo analysis have been performed to verify the robustness of the proposed OTA. The proposed OTA can be used in design of filters and amplifiers for bio-instruments, sensor applications, neural recording applications and human implants etc.

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