Effects of constant voltage stress on p- and n-type organic thin film transistors with poly(methyl methacrylate) gate dielectric

2013 ◽  
Vol 53 (9-11) ◽  
pp. 1798-1803 ◽  
Author(s):  
N. Wrachien ◽  
A. Cester ◽  
D. Bari ◽  
R. Capelli ◽  
R. D’Alpaos ◽  
...  
2009 ◽  
Vol 10 (8) ◽  
pp. 1596-1600 ◽  
Author(s):  
Youngjun Yun ◽  
Christopher Pearson ◽  
Duncan H. Cadd ◽  
Richard L. Thompson ◽  
Michael C. Petty

2010 ◽  
Vol 11 (5) ◽  
pp. 951-954 ◽  
Author(s):  
Jae-Sung Lim ◽  
Paik-Kyun Shin ◽  
Boong-Joo Lee ◽  
Sunwoo Lee

MRS Advances ◽  
2018 ◽  
Vol 3 (49) ◽  
pp. 2931-2936
Author(s):  
G. Kitahara ◽  
K. Aoshima ◽  
J. Tsutsumi ◽  
H. Minemawari ◽  
S. Arai ◽  
...  

ABSTRACTRecently, an epoch-making printing technology called “SuPR-NaP (Surface Photo-Reactive Nanometal Printing)” that allows easy, high-speed, and large-area manufacturing of ultrafine silver wiring patterns has been developed. Here we demonstrate low-voltage operation of organic thin-film transistors (OTFTs) composed of printed source/drain electrodes that are produced by the SuPR-NaP technique. We utilize an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a base layer for producing patterned reactive surface in the SuPR-NaP technique but also as an ultrathin gate dielectric layer of OTFTs. By the use of 22 nm-thick Cytop gate dielectric layer, we successfully operate polycrystalline pentacene OTFTs below 2 V with negligible hysteresis. We also observe the improvement of carrier injection by the surface modification of printed silver electrodes. We discuss that the SuPR-NaP technique allows the production of high-capacitance gate dielectric layers as well as high-resolution printed silver electrodes, which provides promising bases for producing practical active-matrix OTFT backplanes.


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