Glidant effect of hydrophobic and hydrophilic nanosilica on a cohesive powder: Comparison of different flow characterization techniques

Particuology ◽  
2017 ◽  
Vol 31 ◽  
pp. 69-79 ◽  
Author(s):  
Ahmad Fahmi Bin Ruzaidi ◽  
Uttam Kumar Mandal ◽  
Bappaditya Chatterjee
2020 ◽  
Vol 82 (6) ◽  
Author(s):  
K. K. MORAVKAR ◽  
S. D. KORDE ◽  
B. A. BHAIRAV ◽  
S. B. SHINDE ◽  
S. V. KAKULADE ◽  
...  

2012 ◽  
pp. 1375-1382
Author(s):  
Gabriela Juarez-Martinez ◽  
Alessandro Chiolerio ◽  
Paolo Allia ◽  
Martino Poggio ◽  
Christian L. Degen ◽  
...  

Author(s):  
Yanwei Wang ◽  
Craig Snoeyink ◽  
Xudong Pan ◽  
Steven T. Wereley

2016 ◽  
pp. 2105-2114
Author(s):  
Yanwei Wang ◽  
Craig Snoeyink ◽  
Xudong Pan ◽  
Steven T. Wereley

Author(s):  
Rani Anjana ◽  
Kumar Sunil ◽  
Sharma Hitender ◽  
Khar R. K.

The phytosome technology was developed by Indena markedly enhancing the bioavailability of selected phytomedicines, by incorporating phospholipids into standardized plant extract, which improve their absorption and utilization. Phytosome are advanced form of herbal extract that shows better absorption profile than conventional herbal extract. The present review focus on the preparation and characterization techniques of phytosomes, merits and various landmarks in the field of phytosomes.


Author(s):  
Sweta Pendyala ◽  
Dave Albert ◽  
Katherine Hawkins ◽  
Michael Tenney

Abstract Resistive gate defects are unusual and difficult to detect with conventional techniques [1] especially on advanced devices manufactured with deep submicron SOI technologies. An advanced localization technique such as Scanning Capacitance Imaging is essential for localizing these defects, which can be followed by DC probing, dC/dV, CV (Capacitance-Voltage) measurements to completely characterize the defect. This paper presents a case study demonstrating this work flow of characterization techniques.


Author(s):  
Pei Y. Tsai ◽  
Junedong Lee ◽  
Paul Ronsheim ◽  
Lindsay Burns ◽  
Richard Murphy ◽  
...  

Abstract A stringent sampling plan is developed to monitor and improve the quality of 300mm SOI (silicon on insulator) starting wafers procured from the suppliers. The ultimate goal is to obtain the defect free wafers for device fabrication and increase yield and circuit performance of the semiconductor integrated circuits. This paper presents various characterization techniques for QC monitor and examples of the typical defects attributed to wafer manufacturing processes.


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