Effect of Si/O doping on the thermal stability of non-bonded hydrogenated diamondlike carbon coatings

2019 ◽  
Vol 374 ◽  
pp. 1006-1014 ◽  
Author(s):  
Jun Bi ◽  
Manzhong Yang ◽  
Jihua Peng ◽  
Ruida Sheng ◽  
Liejun Li ◽  
...  
1996 ◽  
Vol 80 (5) ◽  
pp. 3068-3075 ◽  
Author(s):  
Z. L. Akkerman ◽  
H. Efstathiadis ◽  
F. W. Smith

1996 ◽  
Vol 443 ◽  
Author(s):  
A. Grill ◽  
V. Patel ◽  
K.L. Saenger ◽  
C. Jahnes ◽  
S.A. Cohen ◽  
...  

AbstractA variety of diamondlike carbon (DLC) materials were investigated for their potential applications as low-k dielectrics for the back end of the line (BEOL) interconnect structures in ULSI circuits. Hydrogenated DLC and fluorine containing DLC (FDLC) were studied as a low-k interlevel and intralevel dielectrics (ILD), while silicon containing DLC (SiDLC) was studied as a potential low-k etch stop material between adjacent DLC based ILD layers, which can be patterned by oxygen-based plasma etchingIt was found that the dielectric constant (k) of the DLC films can be varied between >3.3 and 2.7 by changing the deposition conditions. The thermal stability of these DLC films was found to be correlated to the values of the dielectric constant, decreasing with decreasing k. While DLC films having dielectric constants k>3.3 appeared to be stable to anneals of 4 hours at 400 °C in He, a film having a dielectric constant of 2.7 was not, losing more than half of its thickness upon exposure to the same anneal. The stresses in the DLC films were found to decrease with decreasing dielectric constant, from 700 MPa to about 250 MPa. FDLC films characterized by a dielectric constant of about 2.8 were found to have similar thermal stability as DLC films with k >3.3. The thermally stable FDLC films have internal stresses <300 MPa and are thus promising candidates as a low-k ILD.For the range of Si contents examined (0-9% C replacement by Si), SiDLC films with a Si content of around 5% appear to provide an effective etch-stop for oxygen RIE of DLC or FDLC films, while retaining desirable electrical characteristics. These films showed a steady state DLC/SiDLC etch rate ratio of about 17, and a dielectric constant only about 30% higher than the 3.3 of DLC.


1994 ◽  
Vol 11 (5) ◽  
pp. 285-288 ◽  
Author(s):  
Degang Cheng ◽  
Fanxiu Lü ◽  
Qinbiao Sun ◽  
Wenxiu Yu ◽  
Rang Yang

Author(s):  
Shiro Fujishiro ◽  
Harold L. Gegel

Ordered-alpha titanium alloys having a DO19 type structure have good potential for high temperature (600°C) applications, due to the thermal stability of the ordered phase and the inherent resistance to recrystallization of these alloys. Five different Ti-Al-Ga alloys consisting of equal atomic percents of aluminum and gallium solute additions up to the stoichiometric composition, Ti3(Al, Ga), were used to study the growth kinetics of the ordered phase and the nature of its interface.The alloys were homogenized in the beta region in a vacuum of about 5×10-7 torr, furnace cooled; reheated in air to 50°C below the alpha transus for hot working. The alloys were subsequently acid cleaned, annealed in vacuo, and cold rolled to about. 050 inch prior to additional homogenization


Author(s):  
Yih-Cheng Shih ◽  
E. L. Wilkie

Tungsten silicides (WSix) have been successfully used as the gate materials in self-aligned GaAs metal-semiconductor-field- effect transistors (MESFET). Thermal stability of the WSix/GaAs Schottky contact is of major concern since the n+ implanted source/drain regions must be annealed at high temperatures (∼ 800°C). WSi0.6 was considered the best composition to achieve good device performance due to its low stress and excellent thermal stability of the WSix/GaAs interface. The film adhesion and the uniformity in barrier heights and ideality factors of the WSi0.6 films have been improved by depositing a thin layer of pure W as the first layer on GaAs prior to WSi0.6 deposition. Recently WSi0.1 has been used successfully as the gate material in 1x10 μm GaAs FET's on the GaAs substrates which were sputter-cleaned prior to deposition. These GaAs FET's exhibited uniform threshold voltages across a 51 mm wafer with good film adhesion after annealing at 800°C for 10 min.


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