A semi-theoretical relationship between the breakdown voltage of field plate edge and field plate design in planar P–N junction terminated with finite field plate

2001 ◽  
Vol 32 (9) ◽  
pp. 763-767 ◽  
Author(s):  
Jin He ◽  
Xing Zhang
1999 ◽  
Vol 572 ◽  
Author(s):  
R. K. Chilukuri ◽  
P. Ananthanarayanan ◽  
V. Nagapudi ◽  
B. J. Baliga

ABSTRACTIn this paper, we report the successful use of field plates as planar edge terminations for P+-N as well as N+-P planar ion implanted junction diodes on 6H- and 4H-SiC. Process splits were done to vary the dielectric material (SiO2 vs. Si3N4), the N-type implant (nitrogen vs. phosphorous), the P-type implant (aluminum vs. boron), and the post-implantation anneal temperature. The nitrogen implanted diodes on 4H-SiC with field plates using SiO2 as the dielectric, exhibited a breakdown voltage of 1100 V, which is the highest ever reported measured breakdown voltage for any planar ion implanted junction diode and is nearly 70% of the ideal breakdown voltage. The reverse leakage current of this diode was less than 1×10−5 A/cm2 even at breakdown. The unterminated nitrogen implanted diodes blocked lower voltages (∼840V). In contrast, the unterminated aluminum implanted diodes exhibited higher breakdown voltages (∼80OV) than the terminated diodes (∼275V). This is attributed to formation of a high resistivity layer at the surface near the edges of the diode by the P-type ion implant, acting as a junction termination extension. Diodes on 4H-SiC showed higher breakdown than those on 6H-SiC. Breakdown voltages were independent of temperature in the range of 25 °C to 150 °C, while the leakage currents increased slowly with temperature, indicating surface dominated components.


2015 ◽  
Vol 2015 ◽  
pp. 1-6
Author(s):  
Donghua Liu ◽  
Xiangming Xu ◽  
Feng Jin ◽  
Wenting Duan ◽  
Huihui Wang ◽  
...  

This paper presents a 500 V high voltage NLDMOS with breakdown voltage (VBD) improved by field plate technology. Effect of metal field plate (MFP) and polysilicon field plate (PFP) on breakdown voltage improvement of high voltage NLDMOS is studied. The coeffect of MFP and PFP on drain side has also been investigated. A 500 V NLDMOS is demonstrated with a 37 μm drift length and optimized MFP and PFP design. Finally the breakdown voltage 590 V and excellent on-resistance performance (Rsp= 7.88 ohm * mm2) are achieved.


2020 ◽  
Vol 34 (7) ◽  
pp. 8857-8863
Author(s):  
Yongfeng Liu ◽  
Shijie Bai ◽  
Ping Wei ◽  
Pucheng Pei ◽  
Shengzhuo Yao ◽  
...  

2017 ◽  
Vol 730 ◽  
pp. 102-105
Author(s):  
Ey Goo Kang

The silicon carbide (SiC) material is being spotlighted as a next-generation power semiconductor material due to the characteristic limitations of the existing silicon materials. SiC has a wider band gap, higher breakdown voltage, higher thermal conductivity, and higher saturation electron mobility than Si. However, actual SiC SBDs exhibit a lower dielectric breakdown voltage than the theoretical breakdown voltage that causes the electric field concentration, a phenomenon that occurs on the edge of the contact surface as in the conventional power semiconductor devices. In this paper, we designed an edge termination structure using a field plate structure through oxide etch angle control, and optimized the structure to obtain a high breakdown voltage. The experiment results indicated that oxide etch angle was 45° when the breakdown voltage characteristics of the SiC SBD were optimized and a breakdown voltage of 681V was obtained.


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