Erratum to: “Low-noise design criteria for detector readout systems in deep submicron CMOS technology”

Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment ◽

10.1016/s0168-9002(02)00853-7 ◽

2002 ◽

Vol 489 (1-3) ◽

pp. 599

Author(s):

M Manghisoni ◽

L Ratti ◽

V Re ◽

V Speziali

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Low Noise ◽

Design Criteria ◽

Submicron Cmos ◽

Low Noise Design

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Low-noise design criteria for detector readout systems in deep submicron CMOS technology

Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment ◽

10.1016/s0168-9002(01)01831-9 ◽

2002 ◽

Vol 478 (1-2) ◽

pp. 362-366 ◽

Author(s):

M Manghisoni ◽

L Ratti ◽

V Re ◽

V Speziali

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Low Noise ◽

Design Criteria ◽

Submicron Cmos ◽

Low Noise Design

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A Time-Resolved, Low-Noise Single-Photon Image Sensor Fabricated in Deep-Submicron CMOS Technology

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2012.2188466 ◽

2012 ◽

Vol 47 (6) ◽

pp. 1394-1407 ◽

Author(s):

Marek Gersbach ◽

Yuki Maruyama ◽

Rahmadi Trimananda ◽

Matt W. Fishburn ◽

David Stoppa ◽

...

Keyword(s):

Single Photon ◽

Cmos Technology ◽

Image Sensor ◽

Deep Submicron ◽

Low Noise ◽

Time Resolved ◽

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Equivalent circuit models for stacked spiral inductors in deep submicron CMOS technology

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. ◽

10.1109/iscas.2003.1205682 ◽

2003 ◽

Author(s):

S.C. Rustagi ◽

Chun-Geik Tan

Keyword(s):

Equivalent Circuit ◽

Cmos Technology ◽

Deep Submicron ◽

Spiral Inductors ◽

Submicron Cmos ◽

Equivalent Circuit Models

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Study of SRAM Standby Leakage Reduction Techniques for Deep-submicron CMOS Technology

International Journal of Control and Automation ◽

10.14257/ijca.2017.10.10.05 ◽

2017 ◽

Vol 10 (10) ◽

pp. 49-62

Author(s):

Satyendra Kumar ◽

Kaushik Saha ◽

Hariom Gupta

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Leakage Reduction ◽

Reduction Techniques ◽

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Hot carrier reliability improvement by utilizing phosphorus transient enhanced diffusion for input/output devices of deep submicron CMOS technology

IEEE Electron Device Letters ◽

10.1109/55.887478 ◽

2000 ◽

Vol 21 (12) ◽

pp. 598-600 ◽

Author(s):

H.H.-C. Wang ◽

C.H. Diaz ◽

Boon-Khim Liew ◽

J.Y.-C. Sun ◽

Tahui Wang

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Input Output ◽

Hot Carrier ◽

Enhanced Diffusion ◽

Reliability Improvement ◽

Transient Enhanced Diffusion ◽

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MONOLITHIC SENSORS IN DEEP SUBMICRON CMOS TECHNOLOGY FOR LOW MATERIAL BUDGET, HIGH RATE HEP APPLICATIONS

Astroparticle, Particle and Space Physics, Detectors and Medical Physics Applications ◽

10.1142/9789812819093_0003 ◽

2008 ◽

Author(s):

C. ANDREOLI ◽

L. RATTI ◽

M. MANGHISONI ◽

G. TRAVERSI

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

High Rate ◽

Submicron Cmos ◽

Material Budget

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Deep submicron CMOS technology enables system-on-chip for wireless communications ICs

IEEE Communications Magazine ◽

10.1109/mcom.2008.4623721 ◽

2008 ◽

Vol 46 (9) ◽

pp. 154-161 ◽

Author(s):

M. Hammes ◽

C. Kranz ◽

D. Seippel

Keyword(s):

Wireless Communications ◽

Cmos Technology ◽

Deep Submicron ◽

System On Chip ◽

Submicron Cmos ◽

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Energy efficient signaling in deep submicron CMOS technology

Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design ◽

10.1109/isqed.2001.915250 ◽

2002 ◽

Author(s):

I.B. Dhaou ◽

V. Sundararajan ◽

H. Tenhunen ◽

K.K. Parhi

Keyword(s):

Energy Efficient ◽

Cmos Technology ◽

Deep Submicron ◽

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Channel engineering for analog device design in deep submicron CMOS technology for system on chip applications

IEEE Transactions on Electron Devices ◽

10.1109/ted.2002.801435 ◽

2002 ◽

Vol 49 (9) ◽

pp. 1558-1565 ◽

Author(s):

H.V. Deshpande ◽

Baohong Cheng ◽

J.C.S. Woo

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

System On Chip ◽

Device Design ◽

Analog Device ◽

Channel Engineering ◽

Submicron Cmos ◽

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Design of SCR-based ESD protection device for power clamp using deep-submicron CMOS technology

Microelectronics Journal ◽

10.1016/j.mejo.2009.01.001 ◽

2009 ◽

Vol 40 (6) ◽

pp. 1007-1012 ◽

Author(s):

Yongseo Koo ◽

Kwangyeob Lee ◽

Kuidong Kim ◽

Jongki Kwon

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Protection Device ◽

Esd Protection ◽

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