Full-Band Tunneling Currents in Nanometer-Scale MOS Structures

2003 ◽  
Vol 2 (2-4) ◽  
pp. 439-442
Author(s):  
F. Sacconi ◽  
A. Di Carlo ◽  
P. Lugli ◽  
M. Städele
2004 ◽  
Vol 48 (4) ◽  
pp. 575-580 ◽  
Author(s):  
Fabio Sacconi ◽  
Michael Povolotskyi ◽  
Aldo Di Carlo ◽  
Paolo Lugli ◽  
Martin Städele

2002 ◽  
Vol 314 (1-4) ◽  
pp. 345-349 ◽  
Author(s):  
Fabio Sacconi ◽  
Michael Povolotskyi ◽  
Aldo Di Carlo ◽  
Paolo Lugli ◽  
Martin Städele ◽  
...  

1985 ◽  
Vol 28 (7) ◽  
pp. 717-720 ◽  
Author(s):  
Y. Nissan-Cohen ◽  
J. Shappir ◽  
D. Frohman-Bentchkowsky

2007 ◽  
Vol 54 (12) ◽  
pp. 3168-3176 ◽  
Author(s):  
Fabio Sacconi ◽  
Jean Marc Jancu ◽  
Michael Povolotskyi ◽  
Aldo Di Carlo
Keyword(s):  

AIP Advances ◽  
2014 ◽  
Vol 4 (4) ◽  
pp. 047112 ◽  
Author(s):  
Chin-Sheng Pang ◽  
Jenn-Gwo Hwu

2004 ◽  
Vol 51 (5) ◽  
pp. 741-748 ◽  
Author(s):  
F. Sacconi ◽  
A. Di Carlo ◽  
P. Lugli ◽  
M. Stadele ◽  
J.-M. Jancu
Keyword(s):  

2007 ◽  
Vol 47 (4-5) ◽  
pp. 694-696 ◽  
Author(s):  
F. Sacconi ◽  
J.M. Jancu ◽  
M. Povolotskyi ◽  
A. Di Carlo
Keyword(s):  

2011 ◽  
Vol 1292 ◽  
Author(s):  
Andrés Vercik

ABSTRACTFurther improvements of integrated circuits depend on the continuous downscaling of MOSFET´s, well beyond the limits for which direct tunneling currents are acceptable. These leakage currents affect both the stand-by power dissipation and the formation of the inversion layer ate the semiconductor surface, i.e., the channel formation. The most promising strategy to overcome this problem is the use of high-κ insulator in substitution of or as an additional layer on the traditional silicon dioxide. The aim of this work is using a recently developed theory to describe tunneling from inversion layers for high-κ insulators or stacks and analyze the effects of tunneling current on the thermal equilibrium in these cases.


VLSI Design ◽  
2001 ◽  
Vol 13 (1-4) ◽  
pp. 125-129
Author(s):  
S. J. Wigger ◽  
S. M. Goodnick ◽  
M. Saraniti

We report on the 2D and 3D modeling of ultra-small MOS structures using a newly developed full-band device simulator. The simulation tool is based on a novel approach, featuring a hybrid Ensemble Monte Carlo (EMC)-Cellular Automata (CA) simulation engine. In this hybrid approach charge transport is simulated using the CA in regions of momentum space where most scattering events occur and the EMC elsewhere, thus optimizing the trade-off between the fast, but memory consuming CA method and the slower EMC method. To account for the spatial distribution of the electric field and charge concentration, the hybrid EMC/CA simulator is self-consistently coupled with a 2D and 3D multi-grid Poisson solver. The solver is then used to simulate the performance of a 40 nm gate length n-MOSFET structure.


2021 ◽  
Author(s):  
Ngoc Duc Le ◽  
Brice Davier ◽  
Philippe Dollfus ◽  
Jerome Saint Martin

Abstract A Full Band Monte Carlo simulatorhas been developed to considerphonon transmission across interfaces disposedperpendicularlyto the heat flux. This solver of the Boltzmann transport equation does not require any assumption on the shape the phonon distribution and can naturally consider all phonon transport regimes from the diffusive to the fully ballistic regime. This simulatoris used to study single and double Si/Ge heterostructures from the micrometer scale downto the nanometer scale,i.e. in all phonon transport regime from fully diffusive toballistic.A methodology to determine the thermal conductivity atthermal interfaces is presented.


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