Nonlinear optimisation tool for the full-bridge zero-voltage-switched DC-DC convertor

1993 ◽  
Vol 140 (5) ◽  
pp. 289 ◽  
Author(s):  
A.W. Lotfi ◽  
Q. Chen ◽  
F.C. Lee
Author(s):  
Jong Hak Lee ◽  
Jong Eun Kim ◽  
Chang Su Park ◽  
Nam Il Kim ◽  
Jang Won Moon ◽  
...  

Abstract In this work, a slightly unetched gate hard mask failure was analyzed by nano probing. Although unetched hard mask failures are commonly detected from the cross sectional view with FIB or FIB-TEM and planar view with the voltage contrast, in this case of the very slightly unetched hard mask, it was difficult to find the defects within the failed area by physical analysis methods. FIB is useful due to its function of milling and checking from the one region to another region within the suspected area, but the defect, located under contact was very tiny. So, it could not be detected in the tilted-view of the FIB. However, the state of the failure could be understood from the electrical analysis using a nano probe due to its ability to probe contact nodes across the fail area. Among the transistors in the fail area, one transistor’s characteristics showed higher leakage current and lower ON current than expected. After physical analysis, slightly remained hard mask was detected by TEM. Chemical processing was followed to determine the gate electrode (WSi2) connection to tungsten contact. It was also proven that when gate is floated, more leakage current flows compared to the state that the zero voltage is applied to the gate. This was not verified by circuit simulation due to the floating nodes.


2020 ◽  
Vol 14 (12) ◽  
pp. 2362-2369
Author(s):  
Bao Chen ◽  
Anwen Shen ◽  
Peihe Li ◽  
Xin Luo ◽  
Sang Xu ◽  
...  

2020 ◽  
Vol 48 (5) ◽  
pp. 762-776
Author(s):  
Sayed Hossein Mirlohi ◽  
Mohammad Rouhollah Yazdani ◽  
Ehsan Adib ◽  
Mohammad Reza Amini
Keyword(s):  

Author(s):  
Pavel Purgat ◽  
Soumya Bandyopadhyay ◽  
Zian Qin ◽  
Pavol GAE Bauer

Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2287
Author(s):  
Kaina Qin ◽  
Shanshan Wang ◽  
Zhongjian Kang

With the rapid increase in the proportion of the installed wind power capacity in the total grid capacity, the state has put forward higher and higher requirements for wind power integration into the grid, among which the most difficult requirement is the zero-voltage ride through (ZVRT) capability of the wind turbine. When the voltage drops deeply, a series of transient processes, such as serious overvoltage, overcurrent, or speed rise, will occur in the motor, which will seriously endanger the safe operation of the wind turbine itself and its control system, and cause large-scale off-grid accident of wind generator. Therefore, it is of great significance to improve the uninterrupted operation ability of the wind turbine. Doubly fed induction generator (DFIG) can achieve the best wind energy tracking control in a wide range of wind speed and has the advantage of flexible power regulation. It is widely used at present, but it is sensitive to the grid voltage. In the current study, the DFIG is taken as the research object. The transient process of the DFIG during a fault is analyzed in detail. The mechanism of the rotor overcurrent and DC bus overvoltage of the DFIG during fault is studied. Additionally, the simulation model is built in DIgSILENT. The active crowbar hardware protection circuit is put into the rotor side of the wind turbine, and the extended state observer and terminal sliding mode control are added to the grid side converter control. Through the cooperative control technology, the rotor overcurrent and DC bus overvoltage can be suppressed to realize the zero-voltage ride-through of the doubly fed wind turbine, and ensure the safe and stable operation of the wind farm. Finally, the simulation results are presented to verify the theoretical analysis and the proposed control strategy.


Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1705
Author(s):  
Ingrid Casallas ◽  
Robert Urbina ◽  
Carlos-Ivan Paez-Rueda ◽  
Gabriel Perilla ◽  
Manuel Pérez ◽  
...  

This paper explores the design of a Class-E amplifier with finite DC-feed inductance using three tuning methods. Furthermore, this work quantifies the impacts of the tuning process (referred to in this paper as the tuning effect) on the main figures of merit (FoMs) of this amplifier. The tuning goals were to guarantee two conditions: zero voltage and zero voltage derivative switching (i.e., soft-switching tuning). To the best of the authors’ knowledge, systematic tuning methods have not been analyzed before for this amplifier topology. Two of them are based on the iterative component tuning process, and they have been explored previously in the design of the conventional class-E amplifier with an RF choke inductance. The last tuning method explores the simultaneous adjustment of the control signal period and one amplifier capacitor. The analyzed tuning methods were validated by extensive simulations of case studies, which were designed following the power specifications of the Qi standard. In 100% and 96% of the case studies, zero voltage switching (ZVS) and zero-derivative voltage switching (ZDS) were achieved, respectively. Furthermore, we identified an unexpected behavior in the tuning process (referred to in this paper as the turning point), which consisted of a change of the expected trend of the soft-switching (i.e., ZVS and ZDS) point, and it occurred in 21% of the case studies. When this behavior occurred and converged to at least ZVS, the tuning process required more iterations and a large number of tuning variables. Additionally, after the tuning process, the total harmonic distortion and output power capacity were improved (i.e., in 78% and 61% of the case studies, respectively), whereas the output power, drain and added power efficiencies deteriorated (i.e., in 83%, 61% and 65% of the case studies, respectively) in the overall case studies. However, we could not identify an improvement in the overall FoMs related to the soft-switching tuning. Furthermore, the tuning impact was significant and produced some improvements and some deleterious effects for the FoMs in each case study, without a clear trend by FoMs or by tuning method. Therefore, the amplifier designer may choose the more favorable tuning method and the related FoM trade-offs for the required design specifications.


Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.


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