scholarly journals Open-Hardware and Application Specific Design for the Monitoring System of the Belle II Forward/Backward Electromagnetic Calorimeter

2019 ◽  
Vol 214 ◽  
pp. 01016
Author(s):  
Francesco Di Capua ◽  
Alberto Aloisio ◽  
Fabrizio Ameli ◽  
Antonio Anastasio ◽  
Paolo Branchini ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Monitoring System ◽  
Flash Memory ◽  
Electromagnetic Calorimeter ◽  
Laboratory Equipment ◽  
Open Hardware ◽  
Reference Design ◽  
Belle Ii ◽  
Static Ram ◽  
Application Specific

Control and monitoring of experimental facilities as well as laboratory equipment requires handling a blend of different tasks. Often in industrial or scientific fields there are standards or form factor to comply with and electronic interfaces or custom busses to adopt. With such tight boundary conditions, the integration of an off-the-shelf Single Board Computer (SBC) is not always a possible or viable alternative. The availability of electronic schematics and PCBs with open-source Hardware license for various SBCs overcomes such integration problems, making feasible the implementation of a custom architecture composed by a central core inherited from a vendor reference design (most likely the microprocessor, static RAM and flash memory) augmented with application-specific integrated circuits and hardware resources, in order to handle the requirements of the specific environment. The user is then able to exploit most of the supported tools and software provided by opensource community, fulfilling all the constraints enforced by his environment. We have used such an approach for the design and development of the monitoring system of the endcap electromagnetic calorimeter of the Belle II experiment, presently running at KEK Laboratory (Tsukuba, Japan). Here we present and discuss the main aspects of the hardware architectures and noise performances tailored on the needs of a detector designed around CsI crystal scintillators.

Inlaid Copper Multilevel Interconnections Using Planarization by Chemical-Mechanical Polishing

MRS Bulletin ◽  
1993 ◽  
Vol 18 (6) ◽  
pp. 46-51 ◽  
Author(s):  
S.P. Murarka ◽  
J. Steigerwald ◽  
R.J. Gutmann
Keyword(s):  
Integrated Circuits ◽  
Large Scale ◽  
Ohmic Contacts ◽  
Access Time ◽  
Gigascale Integration ◽  
Interlayer Dielectric ◽  
Application Specific Integrated Circuits ◽  
Large Scale Integration ◽  
Scale Integration ◽  
Application Specific

Continuing advances in the fields of very-large-scale integration (VLSI), ultralarge-scale integration (ULSI), and gigascale integration (GSI), leading to the continuing development of smaller and smaller devices, have continually challenged the fields of materials, processes, and circuit designs. The existing metallization schemes for ohmic contacts, gate metal, and interconnections are inadequate for the ULSI and GSI era. An added concern is the reliability of aluminum and its alloys as the current carrier. Also, the higher resistivity of Al and its use in two-dimensional networks have been considered inadequate, since they lead to unacceptably high values of the so-called interconnection delay or RC delay, especially in microprocessors and application-specific integrated circuits (ICs). Here, R refers to the resistance of the interconnection and C to the total capacitance associated with the interlayer dielectric. For the fastest devices currently available and faster ones of the future, the RC delay must be reduced to such a level that the contribution of RC to switching delays (access time) becomes a small fraction of the total, which is a sum of the inherent device delay associated with the semiconductor, the device geometry and type, and the RC delay.

scholarly journals Offline Data Analysis of the Electromagnetic calorimeter trigger in Belle II experiment

2021 ◽  
Author(s):  
HanEol Cho ◽  
Cheolhun Kim ◽  
Yuji Unno ◽  
ByungGu Cheon
Keyword(s):  
Data Analysis ◽  
Electromagnetic Calorimeter ◽  
Belle Ii

scholarly journals FPGAs in Client Compute Hardware

2021 ◽  
Author(s):  
Michael Mattioli
Keyword(s):  
Integrated Circuits ◽  
Field Programmable Gate Arrays ◽  
Gate Arrays ◽  
Application Specific Integrated Circuits ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
And Performance ◽  
Application Specific

<div>Field-programmable gate arrays (FPGAs) are remarkably versatile. FPGAs are used in a wide variety of applications and industries where use of application-specific integrated circuits (ASICs) is less economically feasible. Despite the area, cost, and power challenges designers face when integrating FPGAs into devices, they provide significant security and performance benefits. Many of these benefits can be realized in client compute hardware such as laptops, tablets, and smartphones.</div>

Monolithical integration of polymer-based microfluidic structures on application-specific integrated circuits

2003 ◽  
Author(s):  
Steffen Chemnitz ◽  
Heiko Schafer ◽  
Stephanie Schumacher ◽  
Volodymyr Koziy ◽  
Alexander Fischer ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Application Specific Integrated Circuits ◽  
Application Specific

Hardware Trojan Detection Technique Using Frequency Characteristic Analysis of Path Delay in Application Specific Integrated Circuits

2020 ◽  
Vol 10 (2) ◽  
pp. 36-43
Author(s):  
Ha Thai Tran ◽  
Phuc Van Hoang ◽  
Tuan Ngoc Do ◽  
Duong Hai Nguyen
Keyword(s):  
Integrated Circuits ◽  
Frequency Characteristic ◽  
Integrated Circuit ◽  
Hardware Security ◽  
Hardware Trojan ◽  
Path Delay ◽  
Characteristic Analysis ◽  
Hardware Trojan Detection ◽  
Ic Manufacturing ◽  
Application Specific

 Abstract—  Since the last decade, hardware Trojan (HT) have become a serious problem for hardware security because of outsourcing trends in Integrated Circuit (IC) manufacturing. As the fabrication of IC is becoming very complex and costly, more and more chipmakers outsource their designs or parts of the fabrication process. This trend opens a loophole in hardware security, as an untrusted company could perform malicious modifications to the golden circuit at design or fabrication stages. Therefore, assessing risks and proposing solutions to detect HT are very important tasks. This paper presents a technique for detecting HT using frequency characteristic analysis of path delay. The results show that measuring with the frequency step of 0.016 MHz can detect a HT having the size of 0.2% of the original design.Tóm tắt— Từ thập niên 2010, Trojan phần cứng (HT) đã trở thành một vấn đề nghiêm trọng đối với bảo mật phần cứng, do xu hướng thuê sản xuất mạch tích hợp (Integrated Circuit - IC). Khi quá trình chế tạo IC trở nên phức tạp và tốn kém, ngày càng nhiều nhà sản xuất chip lựa chọn phương án thuê lại một phần hoặc toàn bộ thiết kế IC. Xu hướng này tạo ra lỗ hổng trong bảo mật phần cứng, vì một công ty không đáng tin cậy có thể thực hiện các sửa đổi độc hại vào trong mạch nguyên bản ở giai đoạn thiết kế hoặc chế tạo. Do đó, đánh giá rủi ro và đề xuất giải pháp phát hiện HT là một trong những nhiệm vụ hết sức quan trọng. Bài báo này trình bày một giải pháp phát hiện HT sử dụng phân tích đặc tính tần số của độ trễ đường truyền tín hiệu. Kết quả cho thấy, thực hiện khảo sát với bước tần số 0,016 MHz có thể phát hiện được HT có kích thước 0,2% so với thiết kế ban đầu. 

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