An application-specific usage model for flash memory read disturb reliability

2002 ◽  
Author(s):  
T.S. Harp ◽  
P.J. Kuhn ◽  
J.M. Higman ◽  
R.E. Paulsen ◽  
B.E. Hornung
Keyword(s):  
Flash Memory ◽  
Application Specific

scholarly journals Open-Hardware and Application Specific Design for the Monitoring System of the Belle II Forward/Backward Electromagnetic Calorimeter

2019 ◽  
Vol 214 ◽  
pp. 01016
Author(s):  
Francesco Di Capua ◽  
Alberto Aloisio ◽  
Fabrizio Ameli ◽  
Antonio Anastasio ◽  
Paolo Branchini ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Monitoring System ◽  
Flash Memory ◽  
Electromagnetic Calorimeter ◽  
Laboratory Equipment ◽  
Open Hardware ◽  
Reference Design ◽  
Belle Ii ◽  
Static Ram ◽  
Application Specific

Control and monitoring of experimental facilities as well as laboratory equipment requires handling a blend of different tasks. Often in industrial or scientific fields there are standards or form factor to comply with and electronic interfaces or custom busses to adopt. With such tight boundary conditions, the integration of an off-the-shelf Single Board Computer (SBC) is not always a possible or viable alternative. The availability of electronic schematics and PCBs with open-source Hardware license for various SBCs overcomes such integration problems, making feasible the implementation of a custom architecture composed by a central core inherited from a vendor reference design (most likely the microprocessor, static RAM and flash memory) augmented with application-specific integrated circuits and hardware resources, in order to handle the requirements of the specific environment. The user is then able to exploit most of the supported tools and software provided by opensource community, fulfilling all the constraints enforced by his environment. We have used such an approach for the design and development of the monitoring system of the endcap electromagnetic calorimeter of the Belle II experiment, presently running at KEK Laboratory (Tsukuba, Japan). Here we present and discuss the main aspects of the hardware architectures and noise performances tailored on the needs of a detector designed around CsI crystal scintillators.

Novel Three Dimensional (3D) NAND Flash Memory Array Having Tied Bit-line and Ground Select Transistor (TiGer)

2012 ◽  
Vol E95.C (5) ◽  
pp. 837-841 ◽  
Author(s):  
Se Hwan PARK ◽  
Yoon KIM ◽  
Wandong KIM ◽  
Joo Yun SEO ◽  
Hyungjin KIM ◽  
...  
Keyword(s):  
Flash Memory ◽  
Three Dimensional ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Memory Array

Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips

2012 ◽  
Vol E95-C (4) ◽  
pp. 534-545 ◽  
Author(s):  
Wei ZHONG ◽  
Takeshi YOSHIMURA ◽  
Bei YU ◽  
Song CHEN ◽  
Sheqin DONG ◽  
...  
Keyword(s):  
Cluster Generation ◽  
Application Specific ◽  
Network Component

Analysis on Hybrid SSD Configuration with Emerging Non-Volatile Memories Including Quadruple-Level Cell (QLC) NAND Flash Memory and Various Types of Storage Class Memories (SCMs)

2020 ◽  
Vol E103.C (4) ◽  
pp. 171-180
Author(s):  
Yoshiki TAKAI ◽  
Mamoru FUKUCHI ◽  
Chihiro MATSUI ◽  
Reika KINOSHITA ◽  
Ken TAKEUCHI
Keyword(s):  
Flash Memory ◽  
Nand Flash ◽  
Nand Flash Memory

Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory

2009 ◽  
Vol E92-C (5) ◽  
pp. 659-663 ◽  
Author(s):  
Doo-Hyun KIM ◽  
Il Han PARK ◽  
Seongjae CHO ◽  
Jong Duk LEE ◽  
Hyungcheol SHIN ◽  
...  
Keyword(s):  
Flash Memory ◽  
Double Gate ◽  
Gate Structure ◽  
Retention Characteristics

Adaptive Interference Mitigation for Multilevel Flash Memory Devices

2011 ◽  
Vol E94-A (11) ◽  
pp. 2453-2457
Author(s):  
Myeongwoon JEON ◽  
Kyungchul KIM ◽  
Sungkyu CHUNG ◽  
Seungjae CHUNG ◽  
Beomju SHIN ◽  
...  
Keyword(s):  
Flash Memory ◽  
Interference Mitigation ◽  
Memory Devices

High Performance NAND Flash Memory System with a Data Buffer

2013 ◽  
Vol E96.A (12) ◽  
pp. 2645-2651 ◽  
Author(s):  
Jung-Hoon LEE ◽  
Bo-Sung JUNG
Keyword(s):  
Flash Memory ◽  
High Performance ◽  
Memory System ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Data Buffer

Analysis of Leakage Failures in Flash Memory Devices and Root Cause Identification

2000 ◽  
Author(s):  
J. N. C. de Luna ◽  
M. O. del Fierro ◽  
J. L. Muñoz
Keyword(s):  
Flash Memory ◽  
Electromagnetic Interference ◽  
Yield Loss ◽  
High Amplitude ◽  
Physical Analysis ◽  
Input Buffer ◽  
Automated Test Equipment ◽  
Root Cause ◽  
Root Cause Identification ◽  
Test Process

Abstract An advanced flash bootblock device was exceeding current leakage specifications on certain pins. Physical analysis showed pinholes on the gate oxide of the n-channel transistor at the input buffer circuit of the affected pins. The fallout contributed ~1% to factory yield loss and was suspected to be caused by electrostatic discharge or ESD somewhere in the assembly and test process. Root cause investigation narrowed down the source to a charged core picker inside the automated test equipment handlers. By using an electromagnetic interference (EMI) locator, we were able to observe in real-time the high amplitude electromagnetic pulse created by this ESD event. Installing air ionizers inside the testers solved the problem.

Sign in / Sign up

Export Citation Format

Share Document