Low temperature boron and phosphorus activation in amorphous germanium using Ni- and Co-induced crystallization and its application for three-dimensional integrated circuits

2008 ◽  
Vol 93 (18) ◽  
pp. 183512 ◽  
Author(s):  
Jin-Hong Park ◽  
Munehiro Tada ◽  
Pawan Kapur ◽  
Krishna C. Saraswat
2019 ◽  
Vol 16 (10) ◽  
pp. 909-916
Author(s):  
Jin-Hong Park ◽  
Munehiro Tada ◽  
Hyun-Yong Yu ◽  
Duygu Kuzum ◽  
Yeul Na ◽  
...  

2012 ◽  
Vol 59 (7) ◽  
pp. 1941-1947 ◽  
Author(s):  
M. R. Lueck ◽  
J. D. Reed ◽  
C. W. Gregory ◽  
A. Huffman ◽  
J. M. Lannon ◽  
...  

2003 ◽  
Vol 762 ◽  
Author(s):  
Yaocheng Liu ◽  
Michael D. Deal ◽  
Mahmooda Sultana ◽  
James D. Plummer

AbstractMetal-induced crystallization (MIC) of amorphous Si is gaining increased interest because of its potential use for low-temperature fabrication of integrated circuits. In this work, the MIC technique was used to make Si nanocrystals and the effects of stress on the crystallization were studied. Amorphous Si films were deposited onto the Si substrate with thermal oxides on top by low-pressure chemical vapor deposition (LPCVD) and then patterned into nanoscale pillars by electron beam lithography and reactive ion etching. A conformal low-temperature oxide (LTO) layer was deposited to cover the pillars, followed by an anisotropic etch back to form a spacer, leaving only the top surface of the pillars exposed to the 5 nm Ni sputtering deposition afterwards. An HF dip was used to partially remove the LTO spacers on the pillars, leading to different LTO thicknesses on different samples. These samples were then annealed to crystallize the amorphous Si pillars, forming Si nanocrystals. Transmission electron microscope (TEM) observations after anneal found a clear dependence of the crystallization rate on the pillar size as well as the LTO thickness. The crystallization rate was lower for pillars with thicker LTO spacers, while for the same LTO thickness the crystallization rate was lower for pillars with narrower width. A model based on the stress in the pillars is proposed to explain this dependence. This model suggests some methods to control the nickel-induced crystallization process and achieve higher quality Si nanocrystals.


2020 ◽  
Vol 2 (2) ◽  
pp. 164-169

In this work, crystallization of amorphous silicon (a-Si) nanorods was done by metal induced crystallization (MIC) method at low temperature (500oC) suitable for circuit applications and low cost, disposable biosensors. The crystallization of a-Si nanorods was investigated by Raman and TEM methods. These data showed oriented crystallized Si nanorods have been obtained by metal induced crystallization (MIC) method on different substrates, which can be suitable for 3D integrated circuits, optical and electrochemical applications. This simple method can be used to produce silicon nanorod arrays with high quality suitable for nanoelectronic and optoelectronic applications.


2003 ◽  
Vol 769 ◽  
Author(s):  
B. Hekmatshoar ◽  
D. Shahrjerdi ◽  
S. Mohajerzadeh ◽  
A. Khakifirooz ◽  
A. Akhavan ◽  
...  

AbstractLow temperature copper-induced crystallization of amorphous germanium (a-Ge) has been significantly enhanced by applying mechanical compressive stress during thermal post-treatment. Manipulation of this technique, alongside with proper patterning of the a-Ge layer before thermo-mechanical process, has led to growth of device-quality poly-Ge layer on flexible PET substrate at temperatures as low as 130°C. Flexibility of the substrate allows the efficient application of uniaxial compressive stress by bending the PET sheets inward. Effects of compressive stress and ultimate crystallization of the Ge layer has been verified by electrical sheet resistance and Hall mobility measurements, and analyzed by XRD, SEM, TEM and RAMAN spectroscopy.


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