Low-Voltage Depletion-Mode Indium-Tin-Oxide Thin-Film Transistors Gated by Ba 0.4 Sr 0.6 TiO 3 Dielectric

2010 ◽  
Vol 27 (7) ◽  
pp. 078502 ◽  
Author(s):  
Wang Li-Ping ◽  
Lu Ai-Xia ◽  
Dou Wei ◽  
Wan Qing
RSC Advances ◽  
2019 ◽  
Vol 9 (53) ◽  
pp. 30715-30719 ◽  
Author(s):  
Wei Dou ◽  
Yuanyuan Tan

Ultralow-voltage (0.8 V) thin-film transistors (TFTs) using self-assembled indium-tin-oxide (ITO) as the semiconducting layer and microporous SiO2 immersed in 5% H3PO4 for 30 minutes with huge electric-double-layer (EDL) capacitance as the gate dielectric are fabricated at room temperature.


2016 ◽  
Vol 63 (3) ◽  
pp. 1072-1077 ◽  
Author(s):  
Xin Xu ◽  
Letao Zhang ◽  
Yang Shao ◽  
Zheyuan Chen ◽  
Yong Le ◽  
...  

2019 ◽  
Vol 19 (9) ◽  
pp. 5619-5623
Author(s):  
Y. L Chen ◽  
G. L Liou ◽  
H. H Hsu ◽  
P. C Chen ◽  
Z. W Zheng ◽  
...  

2011 ◽  
Vol 98 (11) ◽  
pp. 113507 ◽  
Author(s):  
Jie Jiang ◽  
Jia Sun ◽  
Wei Dou ◽  
Bin Zhou ◽  
Qing Wan

2013 ◽  
Vol 103 (7) ◽  
pp. 072110 ◽  
Author(s):  
Bo Sung Kim ◽  
Yeon Taek Jeong ◽  
Doohyoung Lee ◽  
TaeYoung Choi ◽  
Seung-Ho Jung ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document