Temperature dependency and linearity assessment of dual-metal gate stack junctionless accumulation-mode cylindrical surrounding gate (DMGS-JAM-CSG) MOSFET

2021 ◽  
Vol 96 (12) ◽  
pp. 124055
Author(s):  
Sumedha Gupta ◽  
Neeta Pandey ◽  
R S Gupta
Keyword(s):  
Temperature Dependency ◽  
Metal Gate ◽  
Gate Stack ◽  
Accumulation Mode ◽  
Surrounding Gate ◽  
Dual Metal

Metal Wet Etch Issues and Effects in Dual Metal Gate Stack Integration

2006 ◽  
Vol 153 (5) ◽  
pp. G389 ◽  
Author(s):  
Muhammad Mustafa Hussain ◽  
Naim Moumen ◽  
Zhibo Zhang ◽  
Baxter F. Womack
Keyword(s):  
Metal Gate ◽  
Gate Stack ◽  
Dual Metal ◽  
Wet Etch

HIGHLY SCALED CMOS DEVICE TECHNOLOGIES WITH NEW STRUCTURES AND NEW MATERIALS

2006 ◽  
Vol 16 (01) ◽  
pp. 147-173
Author(s):  
YANGYUAN WANG ◽  
RU HUANG ◽  
JINFENG KANG ◽  
SHENGDONG ZHANG
Keyword(s):  
Field Effect Transistors ◽  
Silicon Film ◽  
Double Gate ◽  
New Materials ◽  
Metal Gate ◽  
Gate Stack ◽  
Cmos Inverter ◽  
Short Channel ◽  
High K ◽  
Dual Metal

In this paper field effect transistors (FETs) with new materials and new structures are discussed. A thermal robust HfN/HfO 2 gate stack, which can alleviate the confliction between high quality high k material and low EOT, is investigated. EOT of the gate stack can be scaled down to 0.65nm for MOS capacitor and 0.95nm for MOSFET with higher carrier mobility. A new dual metal gate/high k CMOS integration process was demonstrated based on a dummy HfN technique for better high k quality and metal gate integration. Several new double gate FETs are proposed and investigated, including vertical double gate device with an asymmetric graded lightly doped drain (AGLDD) for better short channel behavior, self-aligned electrically separable double gate device for dynamic threshold voltage operation, new 3-D CMOS inverter based on double gate structure and SOI substrate for compact configuration and new full-symmetric DGJFET for 10nm era with greatly relaxed requirement of silicon film thickness and device design simplification.

High-K Spacer Dual-Metal Gate Stack Underlap Junctionless Gate All Around (HK-DMGS-JGAA) MOSFET for high frequency applications

2019 ◽  
Vol 26 (5) ◽  
pp. 1697-1705 ◽  
Author(s):  
Anubha Goel ◽  
Sonam Rewari ◽  
Seema Verma ◽  
R. S. Gupta
Keyword(s):  
High Frequency ◽  
Metal Gate ◽  
Gate Stack ◽  
High K ◽  
Dual Metal

Metal Wet Etch Process Development for Dual Metal Gate CMOS

2005 ◽  
Vol 8 (12) ◽  
pp. G333 ◽  
Author(s):  
Muhammad Mustafa Hussain ◽  
Naim Moumen ◽  
Joel Barnett ◽  
Jason Saulters ◽  
David Baker ◽  
...  
Keyword(s):  
Process Development ◽  
Metal Gate ◽  
Dual Metal ◽  
Wet Etch
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