scholarly journals Identification of calibration and operating limits of a low-cost embedded system with MEMS accelerometer

2017 ◽  
Vol 882 ◽  
pp. 012006 ◽  
Author(s):  
G D’Emilia ◽  
D Di Gasbarro ◽  
A Gaspari ◽  
E Natale
2021 ◽  
Vol 11 (11) ◽  
pp. 4940
Author(s):  
Jinsoo Kim ◽  
Jeongho Cho

The field of research related to video data has difficulty in extracting not only spatial but also temporal features and human action recognition (HAR) is a representative field of research that applies convolutional neural network (CNN) to video data. The performance for action recognition has improved, but owing to the complexity of the model, some still limitations to operation in real-time persist. Therefore, a lightweight CNN-based single-stream HAR model that can operate in real-time is proposed. The proposed model extracts spatial feature maps by applying CNN to the images that develop the video and uses the frame change rate of sequential images as time information. Spatial feature maps are weighted-averaged by frame change, transformed into spatiotemporal features, and input into multilayer perceptrons, which have a relatively lower complexity than other HAR models; thus, our method has high utility in a single embedded system connected to CCTV. The results of evaluating action recognition accuracy and data processing speed through challenging action recognition benchmark UCF-101 showed higher action recognition accuracy than the HAR model using long short-term memory with a small amount of video frames and confirmed the real-time operational possibility through fast data processing speed. In addition, the performance of the proposed weighted mean-based HAR model was verified by testing it in Jetson NANO to confirm the possibility of using it in low-cost GPU-based embedded systems.


2020 ◽  
Vol 23 (7) ◽  
pp. 25-33
Author(s):  
Luciane Agnoletti dos Santos Pedotti ◽  
Ricardo Mazza Zago ◽  
Mateus Giesbrecht ◽  
Fabiano Fruett

Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1715
Author(s):  
Michele Alessandrini ◽  
Giorgio Biagetti ◽  
Paolo Crippa ◽  
Laura Falaschetti ◽  
Claudio Turchetti

Photoplethysmography (PPG) is a common and practical technique to detect human activity and other physiological parameters and is commonly implemented in wearable devices. However, the PPG signal is often severely corrupted by motion artifacts. The aim of this paper is to address the human activity recognition (HAR) task directly on the device, implementing a recurrent neural network (RNN) in a low cost, low power microcontroller, ensuring the required performance in terms of accuracy and low complexity. To reach this goal, (i) we first develop an RNN, which integrates PPG and tri-axial accelerometer data, where these data can be used to compensate motion artifacts in PPG in order to accurately detect human activity; (ii) then, we port the RNN to an embedded device, Cloud-JAM L4, based on an STM32 microcontroller, optimizing it to maintain an accuracy of over 95% while requiring modest computational power and memory resources. The experimental results show that such a system can be effectively implemented on a constrained-resource system, allowing the design of a fully autonomous wearable embedded system for human activity recognition and logging.


2013 ◽  
Vol 418 ◽  
pp. 63-69
Author(s):  
Sema Patchim ◽  
Watcharin Po-Ngaen

In last decade, energy efficiency of hydraulic actuators systems has been especially important in industrial machinery applications [1-. And an advanced electronics world most of the applications are developed by microcontroller based embedded system. Energy processor based variable oil flow of hydraulic controller was presented to improve the efficiency of the motor by maintaining with the load sensing. These PIC processor combined with fuzzy controller were help to design efficient optimal power hydraulic machine controller. A functional design of processor and in this system was completed by using load sensing signal to control oil flow. The advantage of the proposed system was optimized operational performance and low power utility. Without having the architectural concept of any motor we can control it by using this method. This is a low cost low power controller and easy to use. The experiment results verified its validity.


2015 ◽  
Vol 105 (3) ◽  
pp. 1314-1323 ◽  
Author(s):  
Angela I. Chung ◽  
Elizabeth S. Cochran ◽  
Anna E. Kaiser ◽  
Carl M. Christensen ◽  
Battalgazi Yildirim ◽  
...  

The aim of this paper is to develop a fault diagnosis algorithm by vibrational analysis for an industrial gear hobbing machine. Gear Hobbing is the most dominant and profitable process for manufacturing high quality gears. In order to sustain the market competition gear manufacturers, need to produce high quality gears with minimum possible cost. However, catastrophic failures do occur in gear hobbing process which causes unexpected machine down time and revenue loss. These failures can be avoided by using condition monitoring approaches. In the proposed approach vibration data during different faults such as lubrication error, excessive feed rate, loose bearing error is collected from an industrial gear hobbing machine using three axis MEMS accelerometer. The collected data is analyzed and classified with spectral kurtosis and Dynamic Time Warping algorithm. The efficiency of the proposed approach is 90 percent as determined by experimental results. The proposed approach can provide a low-cost solution for predictive maintenance for gear hobbing industries..


Author(s):  
Pramit Ghosh ◽  
Debotosh Bhattacharjee ◽  
Mita Nasipuri ◽  
Dipak Kumar Basu

Low cost solutions for the development of intelligent bio-medical devices that not only assist people to live in a better way but also assist physicians for better diagnosis are presented in this chapter. Two such devices are discussed here, which are helpful for prevention and diagnosis of diseases. Statistical analysis reveals that cold and fever are the main culprits for the loss of man-hours throughout the world, and early pathological investigation can reduce the vulnerability of disease and the sick period. To reduce this cold and fever problem a household cooling system controller, which is adaptive and intelligent in nature, is designed. It is able to control the speed of a household cooling fan or an air conditioner based on the real time data, namely room temperature, humidity, and time for which system is active, which are collected from environment. To control the speed in an adaptive and intelligent manner, an associative memory neural network (Kramer) has been used. This embedded system is able to learn from training set; i.e., the user can teach the system about his/her feelings through training data sets. When the system starts up, it allows the fan to run freely at full speed, and after certain interval, it takes the environmental parameters like room temperature, humidity, and time as inputs. After that, the system takes the decision and controls the speed of the fan.


Author(s):  
Md Farukh Hashmi ◽  
Avinash G. Keskar

Controller Area Network is an ideal serial bus design suitable for modern embedded system based networks. It finds its use in most of critical applications, where error detection and subsequent treatment on error is a critical issue. CRC (Cyclic Redundancy Check) block was developed on FPGA in order to meet the needs for simple, low power and low cost wireless communication. This paper gives a short overview of CRC block in the Digital transmitter based on the CAN 2.0 protocols. CRC is the most preferred method of encoding because it provides very efficient protection against commonly occurring burst errors, and is easily implemented. This technique is also sometimes applied to data storage devices, such as a disk drive. In this paper a technique to model the error detection circuitry of CAN 2.0 protocols on reconfigurable platform have been discussed? The software simulation results are presented in the form of timing diagram.FPGA implementation results shows that the circuitry requires very small amount of digital hardware. The Purpose of the research is to diversify the design methods by using VHDL code entry through Modelsim 5.5e simulator and Xilinx ISE8.3i.The VHDL code is used to characterize the CRC block behavior which is then simulated, synthesized and successfully implemented on Sparten3 FPGA .Here, Simulation and Synthesized results are also presented to verify the functionality of the CRC -16 Block. The data rate of CRC block is 250 kbps .Estimated power consumption and maximum operating frequency of the circuitry is also provided.


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