An Optimized FPGA Implementation of CAN 2.0 Protocol Error Detection Circuitry

2017 ◽  
Vol 6 (3) ◽  
pp. 602
Author(s):  
Md Farukh Hashmi ◽  
Avinash G. Keskar
Keyword(s):  
Embedded System ◽  
Data Storage ◽  
Error Detection ◽  
Low Cost ◽  
Disk Drive ◽  
Critical Issue ◽  
Subsequent Treatment ◽  
Area Network ◽  
Reconfigurable Platform ◽  
Vhdl Code

Controller Area Network is an ideal serial bus design suitable for modern embedded system based networks. It finds its use in most of critical applications, where error detection and subsequent treatment on error is a critical issue. CRC (Cyclic Redundancy Check) block was developed on FPGA in order to meet the needs for simple, low power and low cost wireless communication. This paper gives a short overview of CRC block in the Digital transmitter based on the CAN 2.0 protocols. CRC is the most preferred method of encoding because it provides very efficient protection against commonly occurring burst errors, and is easily implemented. This technique is also sometimes applied to data storage devices, such as a disk drive. In this paper a technique to model the error detection circuitry of CAN 2.0 protocols on reconfigurable platform have been discussed? The software simulation results are presented in the form of timing diagram.FPGA implementation results shows that the circuitry requires very small amount of digital hardware. The Purpose of the research is to diversify the design methods by using VHDL code entry through Modelsim 5.5e simulator and Xilinx ISE8.3i.The VHDL code is used to characterize the CRC block behavior which is then simulated, synthesized and successfully implemented on Sparten3 FPGA .Here, Simulation and Synthesized results are also presented to verify the functionality of the CRC -16 Block. The data rate of CRC block is 250 kbps .Estimated power consumption and maximum operating frequency of the circuitry is also provided.

Low Cost Wear Leveling for High-Density SPI NAND Flash in Memory Constrained Embedded System

2013 ◽  
Vol 427-429 ◽  
pp. 1277-1280
Author(s):  
Gen Xian Liu ◽  
Dong Sheng Wang
Keyword(s):  
Embedded System ◽  
Data Storage ◽  
Adaptive Design ◽  
Low Cost ◽  
Critical Issue ◽  
Nand Flash ◽  
Wear Leveling ◽  
Simple Interface ◽  
Scale Data ◽  
Nor Flash

SPI NOR Flash is widely used in embedded system for its compact package and simple interface. It is suitable to medium scale data storage. Now, industry provides higher density NAND Flash with the same interface and package as SPI NOR Flash. But the erase/program circles of NAND Flash is less than that of NOR Flash. The lifetime of NAND Flash is becoming the critical issue. Wear leveling algorithms prevent NAND Flash from prematurely retiring by mapping the logical block to different physical blocks. To our knowledge, most wear leveling algorithms need several kilobytes of RAM for keeping the mapping data structures, which is costly for the resource constrained micro controller. This study first proposes a no RAM required design with presetting lifetime, and then presents an adaptive design which requires only 2 kilobytes RAM with elasticity lifetime. The proposed design can be adapted in most of embedded systems based on low cost micro controller.

UTILIZATION OF HIGH-SPEED DSP ALGORITHMS OF CYCLIC REDUNDANCY CHECKING (CRC-15) ENCODER AND DECODER FOR CONTROLLER AREA NETWORK

2016 ◽  
Vol 78 (5-9) ◽  
Author(s):  
Ronnie O. Serfa Juan ◽  
Hi Seok Kim
Keyword(s):  
Error Detection ◽  
High Speed ◽  
Clock Synchronization ◽  
Transmission Rate ◽  
Critical Path ◽  
Low Cost ◽  
Digital Signal ◽  
Transmission Error ◽  
Controller Area Network ◽  
Area Network

Advanced driver assistance system (ADAS) performs an increasing improvement in active road safety and driving convenience. Controller Area Network (CAN) is now getting popular because of its expanding applications and widely utilizations in low-cost embedded systems from automation to medical industry. While implementing an effective and efficient mechanism for clock synchronization, serial operation causes the reduction of CAN transmission rate can have an adverse impact on the real-time applications of systems employing this protocol. Also, maintaining the reliability of this technology especially in safety services, a reliable system needs certain requirements like glitches management and troubleshooting in order to avoid certain occurrences of transmission error.  In this paper we present a simulated Cyclic Redundancy Checking (CRC) encoder and decoder that perform high speed error detection for CAN using CRC-15. Digital Signal Processing (DSP) algorithms were used, namely pipelining, unfolding and retiming to attain the feasible iteration bound and critical path that is appropriate for CAN system. The source code for Encoder and Decoder has been formulated in Verilog Hardware Description Language (HDL) from actual simulation to implementation of this CRC-15 for CAN system.

scholarly journals Energy Optimization for Smart Housing Systems

2020 ◽  
Vol 1 (1) ◽  
pp. 1-6
Author(s):  
Medha Misra ◽  
◽  
Pawan Singh ◽  
Anil Kumar
Keyword(s):  
Data Storage ◽  
Smart Home ◽  
New Technologies ◽  
Local Area Network ◽  
Low Cost ◽  
Local Area ◽  
Raspberry Pi ◽  
Daily Routine ◽  
Area Network ◽  
Authorized User

Smart home is an emerging technology which is growing continuously now. It integrates many of the new technologies with the help of home networking for improving human’s quality and standard of living, so there are many projects which are researching in diverse technologies in order to apply them to the smart home system. As the technology evolves it comforts mankind with some additional ease and advancement. At the time the evolution calls upon all the daily routine devices to operate over internet and this project is based on the idea to make these devices accessible to the owner anytime anywhere. Particularly for now we intend to connect electrical appliances in any house to a kind of a local area network so that it can be operated by the respective authorities so as to minimize the electricity wastage. Further these devices along with sensors can be made to operate on their own, intelligently and accurately. The excellency of the project can be utilized in hostels and classrooms as well where most of the times we find electrical appliances operational even when not necessary. The idea is to turn a house into a smart house. The project utilizes the current technology such as wifi and low cost electronic modules to meet the requirements of IOT and gives it a web as well as an app interface for an ease of access. The technologies which we are using include - Wifi module, Relay module, Raspberry pi, Sensors for automatic support and feedback to user. The project can be extended to cloud also for data storage and providing access to authorized user.

Fabrication of CoPt Nanodot Array with a Pitch of 33 nm Using Pattern-Transfer Technique of PS-PDMS Self-Assembly

2013 ◽  
Vol 596 ◽  
pp. 83-87 ◽  
Author(s):  
Miftakhul Huda ◽  
Zulfakri bin Mohamad ◽  
Takuya Komori ◽  
You Yin ◽  
Sumio Hosaka
Keyword(s):  
Data Storage ◽  
Self Assembly ◽  
Low Cost ◽  
Disk Drive ◽  
Magnetic Data ◽  
Pattern Transfer ◽  
Ion Milling ◽  
Large Area ◽  
Nanodot Array ◽  
Dimethyl Siloxane

The progress of information technology has increased the demand of the capacity of storage media. Bit patterned media (BPM) has been known as a promising method to achieve the magnetic-data-storage capability of more than 1 Tb/in.2. In this work, we demonstrated fabrication of magnetic nanodot array of CoPt with a pitch of 33 nm using a pattern-transfer method of block copolymer (BCP) self-assembly. Carbon hard mask (CHM) was adopted as a mask to pattern-transfer self-assembled nanodot array formed from poly (styrene)-b-poly (dimethyl siloxane) (PS-PDMS) with a molecular weight of 30,000-7,500 mol/g. According to our experiment results, CHM showed its high selectivity against CoPt in Ar ion milling. Therefore, this result boosted the potential of BCP self-assembly technique to fabricate magnetic nanodot array for the next generation of hard disk drive (HDD) due to the ease of large-area fabrication, and low cost.

Perancangan Sistem Backup Data Menggunakan File Transfer Protocol Pada Jaringan Local Area Network Di SMP Negeri 6 Pekanbaru

2020 ◽  
Author(s):  
Sasqia Ismi Aulia ◽  
Keyword(s):  
Data Storage ◽  
Local Area Network ◽  
Local Area ◽  
Area Network ◽  
File Transfer ◽  
Network Connection ◽  
Teachers And Students ◽  
Network Operating Systems ◽  
Selection Of ◽  
Server Computer

This study aims to design a LAN network for data backup systems that are in accordance with certain aspects such as the selection of network design, network hardware, network transmission media, network connection devices, and network operating systems. Data is the most important thing for everyone, data can usually be reused even though it has not been used for some time, and therefore data storage is a serious problem that must be considered. Data on the server computer is very important to be maintained so that a backup process is needed on that data to another computer that is used as a backup in the event of damage to the hardware and software of the server computer. FTP is one of the solutions to the problems faced above,where FTP can be used to process the download and upload between the server and client computers. This design uses the Autobot system. The expected benefit in designing this LAN is that the existing network at SMP Negeri 6 Pekanbaru is not only used by employees and employees but can be used and enjoyed by teachers and students to access the internet anywhere as long as it is still within the scope of the SMP Negeri 6 area Pekanbaru.

scholarly journals Low-Cost Embedded System Using Convolutional Neural Networks-Based Spatiotemporal Feature Map for Real-Time Human Action Recognition

2021 ◽  
Vol 11 (11) ◽  
pp. 4940
Author(s):  
Jinsoo Kim ◽  
Jeongho Cho
Keyword(s):  
Embedded System ◽  
Real Time ◽  
Action Recognition ◽  
Processing Speed ◽  
Recognition Accuracy ◽  
Low Cost ◽  
Human Action Recognition ◽  
Human Action ◽  
Video Data ◽  
Feature Maps

The field of research related to video data has difficulty in extracting not only spatial but also temporal features and human action recognition (HAR) is a representative field of research that applies convolutional neural network (CNN) to video data. The performance for action recognition has improved, but owing to the complexity of the model, some still limitations to operation in real-time persist. Therefore, a lightweight CNN-based single-stream HAR model that can operate in real-time is proposed. The proposed model extracts spatial feature maps by applying CNN to the images that develop the video and uses the frame change rate of sequential images as time information. Spatial feature maps are weighted-averaged by frame change, transformed into spatiotemporal features, and input into multilayer perceptrons, which have a relatively lower complexity than other HAR models; thus, our method has high utility in a single embedded system connected to CCTV. The results of evaluating action recognition accuracy and data processing speed through challenging action recognition benchmark UCF-101 showed higher action recognition accuracy than the HAR model using long short-term memory with a small amount of video frames and confirmed the real-time operational possibility through fast data processing speed. In addition, the performance of the proposed weighted mean-based HAR model was verified by testing it in Jetson NANO to confirm the possibility of using it in low-cost GPU-based embedded systems.

Setting an error detection infrastructure with low cost acoustic wave detectors

2012 ◽  
Vol 40 (3) ◽  
pp. 333-343 ◽  
Author(s):  
Gaurang Upasani ◽  
Xavier Vera ◽  
Antonio González
Keyword(s):  
Acoustic Wave ◽  
Error Detection ◽  
Low Cost

scholarly journals Recurrent Neural Network for Human Activity Recognition in Embedded Systems Using PPG and Accelerometer Data

Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1715
Author(s):  
Michele Alessandrini ◽  
Giorgio Biagetti ◽  
Paolo Crippa ◽  
Laura Falaschetti ◽  
Claudio Turchetti
Keyword(s):  
Neural Network ◽  
Embedded System ◽  
Activity Recognition ◽  
Human Activity ◽  
Recurrent Neural Network ◽  
Low Cost ◽  
Low Complexity ◽  
Human Activity Recognition ◽  
Motion Artifacts ◽  
Accelerometer Data

Photoplethysmography (PPG) is a common and practical technique to detect human activity and other physiological parameters and is commonly implemented in wearable devices. However, the PPG signal is often severely corrupted by motion artifacts. The aim of this paper is to address the human activity recognition (HAR) task directly on the device, implementing a recurrent neural network (RNN) in a low cost, low power microcontroller, ensuring the required performance in terms of accuracy and low complexity. To reach this goal, (i) we first develop an RNN, which integrates PPG and tri-axial accelerometer data, where these data can be used to compensate motion artifacts in PPG in order to accurately detect human activity; (ii) then, we port the RNN to an embedded device, Cloud-JAM L4, based on an STM32 microcontroller, optimizing it to maintain an accuracy of over 95% while requiring modest computational power and memory resources. The experimental results show that such a system can be effectively implemented on a constrained-resource system, allowing the design of a fully autonomous wearable embedded system for human activity recognition and logging.

scholarly journals A Cloud Game-Based Educative Platform Architecture: The CyberScratch Project

2021 ◽  
Vol 11 (2) ◽  
pp. 807
Author(s):  
Llanos Tobarra ◽  
Alejandro Utrilla ◽  
Antonio Robles-Gómez ◽  
Rafael Pastor-Vargas ◽  
Roberto Hernández
Keyword(s):  
Data Storage ◽  
Data Privacy ◽  
Data Science ◽  
Critical Issue ◽  
Privacy Management ◽  
Instructional Process ◽  
Legal Context ◽  
Flexible Architecture ◽  
Efficient Data ◽  
Implementation Guidelines

The employment of modern technologies is widespread in our society, so the inclusion of practical activities for education has become essential and useful at the same time. These activities are more noticeable in Engineering, in areas such as cybersecurity, data science, artificial intelligence, etc. Additionally, these activities acquire even more relevance with a distance education methodology, as our case is. The inclusion of these practical activities has clear advantages, such as (1) promoting critical thinking and (2) improving students’ abilities and skills for their professional careers. There are several options, such as the use of remote and virtual laboratories, virtual reality and game-based platforms, among others. This work addresses the development of a new cloud game-based educational platform, which defines a modular and flexible architecture (using light containers). This architecture provides interactive and monitoring services and data storage in a transparent way. The platform uses gamification to integrate the game as part of the instructional process. The CyberScratch project is a particular implementation of this architecture focused on cybersecurity game-based activities. The data privacy management is a critical issue for these kinds of platforms, so the architecture is designed with this feature integrated in the platform components. To achieve this goal, we first focus on all the privacy aspects for the data generated by our cloud game-based platform, by considering the European legal context for data privacy following GDPR and ISO/IEC TR 20748-1:2016 recommendations for Learning Analytics (LA). Our second objective is to provide implementation guidelines for efficient data privacy management for our cloud game-based educative platform. All these contributions are not found in current related works. The CyberScratch project, which was approved by UNED for the year 2020, considers using the xAPI standard for data handling and services for the game editor, game engine and game monitor modules of CyberScratch. Therefore, apart from considering GDPR privacy and LA recommendations, our cloud game-based architecture covers all phases from game creation to the final users’ interactions with the game.

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