The current trend in IC packaging towards an ever increasing degree of integration, combined with a high level of production flexibility calls for novel approaches in manufacturing. To address these challenges in a flexible manufacturing setting, TNO investigated to what extend mask-less additive manufacturing (3D printing) can be applied to packaging of semiconductor components and systems.
The micro-stereolithography (μSLA) process has been applied to two different cases to assess its feasibility in creating integrated chip packages and interconnects. First, 2D interconnects based on conductive inks have been integrated into thin layers, manufactured using μSLA. In principle, this process allows building a 3D interconnect circuit on a layer-by-layer basis. A second approach is to build a fully functional, densely integrated system based on a 3D interconnect structure in μSLA resin (insulator) followed by global metallization and a trimming step. This approach allows creating almost free form interconnects integrated with functional properties in the package.
These process examples allow manufacturing of small series with complex, integrated packages. Therefore, to asses the industrial relevance, the cost-of-ownership of manufacturing with the μSLA process on 200 mm wafers is estimated as a comparison to wafer-level molding. It will be shown that, especially in cases where complex geometries, integrated functionality or small series are required, mask-less additive manufacturing enables novel manufacturing solutions at reasonable cost.
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