Output impedance of high performance current mode DC-DC buck converters, with applications to voltage-regulator module control combinations

Author(s):  
J.T. Mossoba ◽  
P.T. Krein
Sensors ◽  
2018 ◽  
Vol 18 (10) ◽  
pp. 3370 ◽  
Author(s):  
Saghi Forouhi ◽  
Rasoul Dehghani ◽  
Ebrahim Ghafar-Zadeh

This paper proposes a novel charge-based Complementary Metal Oxide Semiconductor (CMOS) capacitive sensor for life science applications. Charge-based capacitance measurement (CBCM) has significantly attracted the attention of researchers for the design and implementation of high-precision CMOS capacitive biosensors. A conventional core-CBCM capacitive sensor consists of a capacitance-to-voltage converter (CVC), followed by a voltage-to-digital converter. In spite of their high accuracy and low complexity, their input dynamic range (IDR) limits the advantages of core-CBCM capacitive sensors for most biological applications, including cellular monitoring. In this paper, after a brief review of core-CBCM capacitive sensors, we address this challenge by proposing a new current-mode core-CBCM design. In this design, we combine CBCM and current-controlled oscillator (CCO) structures to improve the IDR of the capacitive readout circuit. Using a 0.18 μm CMOS process, we demonstrate and discuss the Cadence simulation results to demonstrate the high performance of the proposed circuitry. Based on these results, the proposed circuit offers an IDR ranging from 873 aF to 70 fF with a resolution of about 10 aF. This CMOS capacitive sensor with such a wide IDR can be employed for monitoring cellular and molecular activities that are suitable for biological research and clinical purposes.


Author(s):  
Babitha S ◽  
Mr. Hemanth Naidu K J ◽  
Mr. Ashwin Goutham G ◽  
Mr. Harshith S V

Portable electronic devices mostly used battery as their primary source for operation hence longer running batteries or Power resources or vital for any portable device need for stable voltage supplies have led to the development of low dropout voltage regulators low dropout regulators provide stable regulated output voltage in various operating conditions which makes it useful in portable devices that design of high performance and stable low dropout voltage regulator is a challenge nowadays with decreasing device size and increasing power densities. The proposed circuit used a 5pack architecture of error amplifier. This paper proposes the study of behavior of the LDO voltage regulator with internal capacitors i.e., capless. The regulated voltage of 1.8V is obtained using the typical power supply of 2.2V obtained dropout voltage of 400mv with the delay of 12.77micro sec, power consumed 1.816W. The proposed design produced DC gain of 31.77db,with the load current variation of 0 to 20mA. The capless LDO architecture is verified in the Cadence 180nm technology. The architecture provides a stable gain and plot for both Temperature and Load Variations. The stability issues are overcome using the compensation techniques which uses a current amplifier and a capacitor in the differentiator configuration. The current amplifier implemented uses current mirror with current copying ratio of unity.


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