Low Power Low Area Implementation of CORDIC Architecture Using Carry Select Adder for Realtime DSP Applications

2020 ◽  
Author(s):  
Lakshmi Shrinivasan ◽  
Krishika Ponnamma C.R.
Keyword(s):  
Low Power ◽  
Low Area ◽  
Carry Select Adder ◽  
Dsp Applications

scholarly journals XOR Based Carry Select Adder for Area and Delay

2020 ◽  
Vol 5 (6) ◽  
pp. 1615-1621
Author(s):  
Ramyabanu Bobba ◽  
Pooja Illa
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
Design Research ◽  
Logic Gate ◽  
Vlsi Design ◽  
Full Adder ◽  
Low Area ◽  
Carry Select Adder ◽  
Technology Comparison

Low power and area proficient high-speed circuits are the most important areas in VLSI design research. Carry select adder is one of the fastest adders with the low area and power consumption. The paper introduces a 16-bit carry select adder with an optimized multiplexer based full adder circuit using Gate Diffusion Input logic (GDI) technology. Comparison is done on Area, Power and Delay parameters. Our circuit requires only two XOR gates and a multiplexer. In this, each logic gate is designed using GDI technology. This further reduces the transistor count resulting in Area, power, delay and complexity minimization. The proposed 16-bit carry select adder provides better results compared to the conventional 16-bit carry select adder with Area and delay.

A Low-Area and Low-Power Comma Detection and Word Alignment Circuits for JESD204B/C Controller

2021 ◽  
pp. 1-11
Author(s):  
Peng Yin ◽  
Zhou Shu ◽  
Yingjun Xia ◽  
Tianmei Shen ◽  
Xiao Guan ◽  
...  
Keyword(s):  
Low Power ◽  
Word Alignment ◽  
Low Area

scholarly journals Modified Low Power Binary to Excess Code Converter

2015 ◽  
Vol 4 (03) ◽  
pp. 06-10
Author(s):  
Ms. Mayuri Ingole
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
High Performance ◽  
Major Aspect ◽  
Code Converter ◽  
Ripple Carry Adder ◽  
Carry Select Adder ◽  
The One

Utilization of power is a major aspect in the design of integrated circuits. Since, adders are mostly employed in these circuits, we should design them effectively. Here, we propose an easy and effective method in decreasing the maximum consumption of power. Carry Select Adder is the one which is dependent on the design of two adders. We present a high performance low-power adder that is implemented. Also, here in Carry Select Adder, Binary Excess Code-1is replaced by Ripple Carry Adder. After analyzing the results, we can come to a conclusion that the architecture which is proposed will have better results in terms of consumption of power compared to conventional techniques. 

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