Modelling and improvement of thermal cycling in power electronics for motor drive applications

2016 ◽  
Author(s):  
Ionut Vernica ◽  
Ke Ma ◽  
Frede Blaabjerg
Keyword(s):  
Thermal Cycling ◽  
Power Electronics ◽  
Motor Drive

A project-oriented approach for power electronics and motor drive courses

2015 ◽  
Vol 52 (3) ◽  
pp. 219-236 ◽  
Author(s):  
Rafael Rodriguez-Ponce ◽  
Roberto A Gomez-Loenzo ◽  
Juvenal Rodriguez-Resendiz
Keyword(s):  
Power Electronics ◽  
Motor Drive ◽  
Oriented Approach

Advanced DBC - Highly Reliable and Conductive Copper Ceramic Substrates

2016 ◽  
Vol 2016 (CICMT) ◽  
pp. 000073-000078
Author(s):  
Paul Gundel ◽  
Anton Miric ◽  
Kai Herbst ◽  
Melanie Bawohl ◽  
Jessica Reitz ◽  
...  
Keyword(s):  
Thermal Conductivity ◽  
Thermal Cycling ◽  
Power Electronics ◽  
Thick Film ◽  
Low Cost ◽  
Automotive Applications ◽  
Ceramic Substrates ◽  
Hybrid Technologies

Abstract So far Direct Bonded Copper (DBC) substrates have been the standard for power electronics. They provide excellent electrical and thermal conductivity at low cost. Weaknesses of DBC technology are the inevitable warpage and the relatively low reliability under thermal cycling. The low reliability poses a significant hurdle in particular for automotive applications with high lifetime requirements. Thick Print Copper (TPC) substrates with low warpage and excellent reliability overcome these weaknesses, but also provide a reduced conductivity at a higher cost. We present two thick-film/DBC hybrid technologies which combine the best properties of DBC and TPC: excellent conductivity, low cost, reduced warpage and excellent reliability.

Reliability Assessment of a New Power Electronics Packaging Material: Silver Diamond Composite

2013 ◽  
Vol 10 (2) ◽  
pp. 54-58 ◽  
Author(s):  
M. Faqir ◽  
J. W. Pomeroy ◽  
T. Batten ◽  
T. Mrotzek ◽  
S. Knippscheer ◽  
...  
Keyword(s):  
Thermal Cycling ◽  
Power Electronics ◽  
Structural Changes ◽  
Coefficient Of Thermal Expansion ◽  
Base Plate ◽  
Electronics Packaging ◽  
Case Scenario ◽  
Worst Case ◽  
New Material ◽  
Work Samples

A reliability analysis of silver diamond composites in terms of both thermal and mechanical properties is presented. This new material is an attractive solution for power electronics packaging, because an improvement of 50% in terms of thermal management and channel temperature can be obtained when using silver diamond composites as a base plate in packages compared with the more traditionally used materials such as CuW. However, to date, little is known about the reliability of this new material, such as changes induced in its properties by thermal cycling. Assessment of the reliability of silver diamond composites is the aim of this work. Samples were submitted to 10 thermal cycles from room temperature to 350°C, and subsequently, a further 500 cycles of thermal shock as well as thermal cycling from −55°C to 125°C following typical standards used in space and military applications. In the worst-case scenario, thermal conductivity only decreased from 830 W/m·K to ∼700 W/m·K. An increase in the coefficient of thermal expansion and a change in diamond stress, were also observed after thermal cycling. Some structural modifications at the silver-diamond interface were found to be the underlying reason for the observed material properties change. These structural changes take place after the initial thermal cycling, and are constant thereafter. Changes found in thermal properties are satisfactory for enabling a significant improvement to standard CuW packaging materials.

Shear Strength and Thermomechanical Reliability of Sintered Ag Joints Containing low CTE Non-metal Additives for Die Attach

2018 ◽  
Vol 2018 (1) ◽  
pp. 000167-000172
Author(s):  
Guangyu Fan ◽  
Christine Labarbera ◽  
Ning-Cheng Lee ◽  
Colin Clark
Keyword(s):  
Shear Strength ◽  
High Temperature ◽  
Thermal Cycling ◽  
Power Electronics ◽  
Metal Particles ◽  
Mechanical Reliability ◽  
Die Attach ◽  
Silver Sinter ◽  
Metal Additives ◽  
Sintered Silver

Abstract Ag sintering has been paid attention as an alternative to soldering in die attach for decades, especially for high temperature power electronics packages because of its high melting temperature, highly thermal and electrical conductivity of the sintered silver joints, and low process temperature less than 275°C. The coefficient of thermal expansion (CTE) of silver (19.1ppm/°C), however, is much higher than the silicon die (2.6ppm/°C) and the commonly used alumina substrate (7.2ppm/°C). CTE mismatch of the different materials in the various components in a power electronics package lead to the delamination at the interface between interconnection layer and chips or substrate, and/or cracking of the interconnection layer is one of the mostly common causes of failure of power electronics device during thermal cycling or high temperature operation. In recent years we have been developing a series of silver sinter pastes containing low CTE non-metal particles to reduce or adjust CTE of the sintered joints so as to extend the lifetime and reliability of power electronics device in high temperature applications. In the present paper, we will report a new set of silver sinter pastes containing micro scale non-metal particles, a sintering process, microstructural morphologies, thermo-mechanical reliability of the sintered joint and effect of the contents of non-metal particles on shear strength of the sintered silver joints bonding an Ag silicon die on Ni/Au DBC substrates. Shear tests on the sintered joints with and/or without the low CTE non-metal additives have been conducted at room temperature, 200, 250, and 300°C. Thermo-mechanical reliability of the sintered joints was evaluated by thermal cycling, thermal shock, high temperature storage tests (HTS), respectively. X-ray inspection and scanning electronic microscopy (SEM) were used to characterize void, crack and microstructure morphologies of the sintered joints with and/or without the additives.

Co-optimized Reliability and Parasitic inductance in Small Footprint Vertical Silicon Carbide MOSFET

2018 ◽  
Vol 2018 (HiTEC) ◽  
pp. 000087-000092
Author(s):  
M. Montazeri ◽  
S. Seal ◽  
A. Wallace ◽  
A. Mantooth ◽  
D. Huitink
Keyword(s):  
Silicon Carbide ◽  
Thermal Cycling ◽  
Power Electronics ◽  
Flip Chip ◽  
Thermal Dissipation ◽  
Electrical Performance ◽  
Element Analysis ◽  
Great Opportunity ◽  
Parasitic Inductance ◽  
Fea Simulation

Abstract Increasing power density in power electronics is driving a need for improved packaging methods for co-optimized high frequency performance, thermal dissipation and reliable operation, especially at high temperatures. Silicon Carbide (SiC) devices offer great opportunity as wide bandgap semiconductor devices, which maintain stability over wide temperature ranges, especially when compared to Silicon (Si) based devices. A novel flip-chip packaging technique for SiC power devices was developed at the University of Arkansas. This new package re-orients a bare die from a lateral device to a vertical device by utilizing a copper connector that routes the drain connection to the top side of the die. This study involves an investigation of achieving a co-optimized packaging configuration for thermomechanical reliability and low parasitic inductance. By orienting this SiC switch vertically, the unique 3D drain connector dramatically reduces the ringing at aggressive switching speeds used in power electronics when compared to Commercial Off The Shelf (COTS) devices. However, the design of this drain connector holds importance for high temperature operation, interconnect reliability as well as manufacturability. Effects of the packaging design, including materials, layout and solder pitch size were investigated from a thermal cycling reliability aspect. Electrical performance, such as parasitic inductances of the device, was also investigated using Finite Element Analysis (FEA) simulation. Several drain connector architectures were evaluated for their fatigue life capability of solder interconnects under thermal cycling (according to Darveaux's model) in conjunction with the parasitic inductance using FEA simulation. Based on the simulation results, an optimized architecture was selected and fabricated for prototype demonstration, and the electrical performance under double pulse test compared with state of the art devices demonstrated improvement in switching performance by reducing overshoot of voltage across the grain-source by 36% and 77% reduction of the drain current ringing during the turn-off event while eliminating voltage overshoot during turn-on event for the testing conditions.

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