electronics packaging
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Metals ◽  
2021 ◽  
Vol 11 (12) ◽  
pp. 1941
Author(s):  
Byungmin Ahn

In the field of electronics packaging, Pb-bearing solder alloys are mostly used as robust interconnecting materials [...]


Author(s):  
Sri Krishna Bhogaraju ◽  
Hiren R. Kotadia ◽  
Fosca Conti ◽  
Armin Mauser ◽  
Thomas Rubenbauer ◽  
...  

2021 ◽  
Author(s):  
JOHN B. F FERGUSON ◽  
AJIT K. ROY ◽  
SABYASACHI GANGULI, ◽  
JOHN G. JONES ◽  
SERGEI V. SHENOGIN ◽  
...  

Composite interfaces between heterogeneous materials exist in many applications which includes electronics packaging. The interface will affect properties such as mechanical integrity during thermal cycling, heat transport and electrical transport due to the inherent disparate properties such as coefficient of thermal expansion (CTE), atomic structure, interface bonding and fabrication processes. Novel interface engineering will be vital for electronics packaging utilized in extreme environment temperatures beyond the standard ranges such as -55 °C to 150 °C. The failure of standard electronics packaging materials with heterogeneous interfaces under thermal cycle fatigue is investigated. Based on the failure analysis, several multifunctional interfaces are developed to bridge the heterogeneous interface and to provide the desired properties and functionality. Approaches to achieve these heterogeneous structures, the materials choices to preserve the multifunctional properties and the modeling predictions are considered. Test structures are prepared of the candidate interfaces, the morphologies are investigated and testing of the thermal cycle fatigue properties over the range -55 °C to 300 °C is performed and will be discussed.


Processes ◽  
2021 ◽  
Vol 9 (9) ◽  
pp. 1634
Author(s):  
Sarthak Acharya ◽  
Shailesh Singh Chouhan ◽  
Jerker Delsing

Advancements in production techniques in PCB manufacturing industries are still required as compared to silicon-ICs fabrications. One of the concerned areas in PCBs fabrication is the use of conventional methodologies for metallization. Most of the manufacturers are still using the traditional Copper (Cu) laminates on the base substrate and patterning the structures using lithography processes. As a result, significant amounts of metallic parts are etched away during any mass production process, causing unnecessary disposables leading to pollution. In this work, a new approach for Cu metallization is demonstrated with considerable step-reducing pattern-transfer mechanism. In the fabrication steps, a seed layer of covalent bonded metallization (CBM) chemistry on top of a dielectric epoxy resin is polymerized using actinic radiation intensity of a 375 nm UV laser source. The proposed method is capable of patterning any desirable geometries using the above-mentioned surface modification followed by metallization. To metallize the patterns, a proprietary electroless bath has been used. The metallic layer grows only on the selective polymer-activated locations and thus is called selective metallization. The highlight of this production technique is its occurrence at a low temperature (20–45 °C). In this paper, FR-4 as a base substrate and polyurethane (PU) as epoxy resin were used to achieve various geometries, useful in electronics packaging. In addition, analysis of the process parameters and some challenges witnessed during the process development are also outlined. As a use case, a planar inductor is fabricated to demonstrate the application of the proposed technique.


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