Applications of Wafer Level Packages (WLPs) have shown tremendous growth in the rapid developing smartphones and other portable electronic devices. The technology trends lead to smaller chip size, low cost, and more integrated functions, but also face higher reliability requirements due to the reduced number of solder bumps as well as smaller bump size and height. New assembly technologies such as flexible phone board and conformal coating also brought up new thermo-mechanical reliability challenges.
Based on 3D finite element modeling, the current studies focus on solder joint reliability of WLPs and compared between flex based and traditional rigid based WLP assemblies. Conformal coated and underfilled WLPs as well as some bump parameters are also studied. The parametric studies were carried out in ANSYS and all models were created by using APDL (ANSYS Parametric Design Language) scripts. Each simulation starts from stress free status set at solder reflow temperature and were subjected to thermal cyclic load between −40 and +125°C with ramp and dwell time. Creep strain was considered for solder alloys and kinematic plastic hardening was considered for other elastic-plastic materials. The solder fatigue life is estimated by using modified Coffin-Manson equation and was compared with available thermal cycling test data. The results show that underfill is still the most effective option and conformal coating can play an important role if the right material is selected. Bump parameters such as height, which have certain effects on the solder reliability on WLP-on-Rigid, have limited impact on WLP-on-Flex assembly.