A Hybrid Approach to Improve the Robustness Against Unbalanced Voltage Supply and Cancel the Common Mode Voltage for a 3-ph Buck-Type Rectifier

2006 ◽  
Author(s):  
Junaidi Abdul Aziz ◽  
Christian Klumpner ◽  
Jon Clare
Keyword(s):  
Hybrid Approach ◽  
Common Mode ◽  
Voltage Supply ◽  
Common Mode Voltage ◽  
Unbalanced Voltage ◽  
The Common

scholarly journals A New Approach to the PWM Modulation for the Multiphase Matrix Converters Supplying Loads with Open-End Winding

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 466
Author(s):  
Pawel Szczepankowski ◽  
Natalia Strzelecka ◽  
Enrique Romero-Cadaval
Keyword(s):  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Simulation Software ◽  
Common Mode ◽  
New Approach ◽  
Matrix Converters ◽  
Load Voltage ◽  
Common Mode Voltage ◽  
The Common ◽  
Open End Winding

This article presents three variants of the Pulse Width Modulation (PWM) for the Double Square Multiphase type Conventional Matrix Converters (DSM-CMC) supplying loads with the open-end winding. The first variant of PWM offers the ability to obtain zero value of the common-mode voltage at the load’s terminals and applies only six switches within the modulation period. The second proposal archives for less Total Harmonic Distortion (THD) of the generated load voltage. The third variant of modulation concerns maximizing the voltage transfer ratio, minimizing the number of switching, and the common-mode voltage cancellation. The discussed modulations are based on the concept of sinusoidal voltage quadrature signals, which can be an effective alternative to the classic space-vector approach. In the proposed approach, the geometrical arrangement of basic vectors needed to synthesize output voltages is built from the less number of vectors, which is equal to the number of the matrix converter’s terminals. The PWM duty cycle computation is performed using only a second-order determinant of the voltages coordinate matrix without using trigonometric functions. A new approach to the PWM duty cycles computing and the load voltage synthesis by 5 × 5 and 12 × 12 topologies has been verified using the PSIM simulation software.

scholarly journals Opposite Triangle Carrier with SVPWM for Common-Mode Voltage Reduction in Dual Three Phase Motor Drives

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim
Keyword(s):  
Electromagnetic Interference ◽  
Pulse Width Modulation ◽  
Motor Drives ◽  
Common Mode ◽  
Pwm Inverter ◽  
Common Mode Voltage ◽  
Voltage Vector ◽  
Three Phase ◽  
The Common ◽  
Zero Voltage

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.

scholarly journals Optimization of TSPWM for Common-Mode Voltage Reduction in Vehicular Electric Drive System

2021 ◽  
Vol 13 (1) ◽  
pp. 5
Author(s):  
Shang Jiang ◽  
Yuan Wang
Keyword(s):  
Electric Drive ◽  
Drive System ◽  
Modulation Method ◽  
Time Interval ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Electric Drive System ◽  
The Common ◽  
Modulation Methods ◽  
Zero Voltage

Common-mode voltage can be reduced effectively by optimized modulation methods without increasing additional costs. However, the existing methods cannot satisfy the requirements of the vehicular electric-drive application. This paper optimizes the tri-state voltage modulation method to reduce the common-mode voltage for vehicular electric drive system applications. Firstly, the discontinuous switching issue during sector transition is analyzed. Under the limit of two switching times in one period, multiple alignments combination is proposed to address that issue. Secondly, the zero-voltage time intervals in different modulation ranges are explored. This paper proposes an unsymmetric translation method to reconstruct the voltage vector, and then the minimum zero-voltage time interval is controlled to enough value for safe switching. Finally, the proposed methods have been validated through experiments on a vehicular electric drive system. The results show that the common-mode voltage can be reduced effectively in the whole range with the optimized tri-state voltage modulation method.

scholarly journals A 2.5 Gbps, 10-Lane, Low-Power, LVDS Transceiver in 28 nm CMOS Technology

Electronics ◽  
2019 ◽  
Vol 8 (3) ◽  
pp. 350 ◽  
Author(s):  
Xu Bai ◽  
Jianzhong Zhao ◽  
Shi Zuo ◽  
Yumei Zhou
Keyword(s):  
Low Power ◽  
High Speed ◽  
Low Voltage ◽  
Cmos Technology ◽  
Common Mode ◽  
Serial Interface ◽  
Common Mode Voltage ◽  
Rail To Rail ◽  
The Common ◽  
28 Nm

This paper presents a 2.5 Gbps 10-lane low-power low voltage differential signaling (LVDS) transceiver for a high-speed serial interface. In the transmitter, a complementary MOS H-bridge output driver with a common mode feedback (CMFB) circuit was used to achieve a stipulated common mode voltage over process, voltage and temperature (PVT) variations. The receiver was composed of a pre-stage common mode voltage shifter and a rail-to-rail comparator. The common mode voltage shifter with an error amplifier shifted the common mode voltage of the input signal to the required range, thereby the following rail-to-rail comparator obtained the maximum transconductance to recover the signal. The chip was fabricated using SMIC 28 nm CMOS technology, and had an area of 1.46 mm2. The measured results showed that the output swing of the transmitter was around 350 mV, with a root-mean-square (RMS) jitter of 3.65 [email protected] Gbps, and the power consumption of each lane was 16.51 mW under a 1.8 V power supply.

scholarly journals A Comprehensive Double-Vector Approach to Alleviate Common-Mode Voltage in Three-Phase Voltage-Source Inverters with a Predictive Control Algorithm

Electronics ◽  
2019 ◽  
Vol 8 (8) ◽  
pp. 872 ◽  
Author(s):  
Eun-Su Jun ◽  
So-young Park ◽  
Sangshin Kwak
Keyword(s):  
Predictive Control ◽  
Sampling Period ◽  
Voltage Source ◽  
Small Current ◽  
Common Mode ◽  
Voltage Source Inverters ◽  
Common Mode Voltage ◽  
The Common ◽  
Current Ripples ◽  
Vector Approach

In this paper, a comprehensive double-vector approach is proposed to alleviate the common-mode voltage of voltage-source inverters based on a model predictive control scheme. Only six active vectors are selected to alleviate the common-mode voltage. Furthermore, one sampling period must be split to apply two non-zero vectors, which can generate currents with small current ripples and errors, despite not using zero vectors. The developed algorithm regards in full all 36 possible cases combined by two non-zero active vectors when selecting two vectors and splitting them into one sampling period. Thus, an optimal future set of two non-zero active vectors and optimal durations of two non-zero active vectors to produce the smallest current errors between the real currents and the reference in future load current trajectories were selected from 36 entire sets. This was done to minimize the cost function defined at the time when it varies from the first vector to the second vector and at the next sampling instant. Thus, the proposed algorithm can control the output currents with a fast transient response and reduce output-current ripples and errors, as well as alleviate the common-mode voltage to ± V d c / 6 .

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