Modeling and Signal Integrity Analysis of Mounting Pad with Layer-cutting to reduce Impedance Mismatch for Dual-In-Line Memory Module (DIMM)

Author(s):  
Hyunwoong Kim ◽  
Jongwook Kim ◽  
Kyunghwan Song ◽  
Seonghi Lee ◽  
Keunwoo Kim ◽  
...  
2014 ◽  
Vol 548-549 ◽  
pp. 754-759 ◽  
Author(s):  
Ling Bao Zhao ◽  
Qing Hua Chen

In modern electronic systems, data rate is keeping increase, and Gbps becomes common, designing for reliable signal integrity becomes more and more important. In the high speed borad/package design, discontinuities are big concerns of signal integrity. A variety of sources lead to discontinuities and every source ought to be carefully treated. The signal via is one source of discontinuity that should not be overlooked. Vias can add jitter and reduce eye openings that can cause data misinterpretation by the receiver. This paper detail the antipad, pad and excess via stub effect on the vias. In each case, the impedance mismatch at the via transition can be minimized by optimizing a few parameters such as antipad radius, pad radius and excess via stub. The impacts of these parameters are investigated with the help for a full-wave 3D electromagnetic simulator.


2004 ◽  
Vol 27 (4) ◽  
pp. 611-629 ◽  
Author(s):  
E. Matoglu ◽  
N. Pham ◽  
D.N. deAraujo ◽  
M. Cases ◽  
M. Swaminathan

Author(s):  
Abhijit Dharchoudhury ◽  
David Blaauw ◽  
Shantanu Ganguly

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