High-performance low-dropout regulator achieved by fast transient mechanism

Author(s):  
Hong-Wei Huang ◽  
Chia-Hsiang Lin ◽  
Ke-Horng Chen
2019 ◽  
Vol 1303 ◽  
pp. 012128
Author(s):  
Zhikui Duan ◽  
Xiaomeng Zhao ◽  
Qiushi Li ◽  
Guo Niu ◽  
Jianguo Hu ◽  
...  

2021 ◽  
Author(s):  
Darshil Patel

Low noise, high PSRR and fast transient low-dropout (LDO) regulators are critical for analog blocks such as ADCs, PLLs and RF SOC, etc. This paper presents design of low power, fast transient, high PSRR and high load-regulation low-dropout (LDO) regulator. The proposed LDO regulator is designed in 180nm. CMOS process and simulated in LTSpice and Cadence platform. The LDO proposed can support input voltage range up to 5V for loading currents up to 230mA. Measurements showed transient time or set-up time of less than 22µs, PSRR of ~66dB at 100kHz and >40dB at 1MHz and 0.8535mV of output voltage variation for a 0-230mA of load variation.


Author(s):  
Lanya Yu ◽  
Qisheng Zhang ◽  
Xiao Zhao ◽  
Boran Wen ◽  
Liyuan Dong ◽  
...  

2019 ◽  
Vol 19 (3) ◽  
pp. 254-259
Author(s):  
Jae-Hoon Jung ◽  
Jae-Hyung Jung ◽  
Young-Ho Jung ◽  
Hoe-Eung Jeong ◽  
Seong-Kwan Hong ◽  
...  

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