A 90-nm CMOS high efficiency on chip DC-DC converter for ultra-low power low cost applications

Author(s):  
A. Samir ◽  
E. Kussener ◽  
W. Rahajandraibe ◽  
H. Barthelemy ◽  
L. Girardeau
2019 ◽  
Vol 8 (2) ◽  
pp. 6167-6174

The ARM Advanced Microcontroller Bus Architecture (AMBA) is an open-criterion, on-chip interrelate particle particular in favor of the association also the board of useful squares in framework on a chip (SoC) plans. It encourages improvement of multi processor plans through expansive quantities of manager as well as peripherals among a transport design. Seeing as its commencement, the extent of AMBA has, regardless of its name, disappeared a long way past microcontroller gadgets. Nowadays, AMBA is broadly utilized on a scope of ASIC along with SoC divisions incorporating requests processors utilized in current convenient cell phones like advanced mobile phones. The structure comprises of at least one CPUs, GPUs or flag processors, autonomous, to permit reuse of IP centers, fringe and framework full scale cells crosswise over differing IC forms, supporting superior and low power on-chip correspondence.


Proceedings ◽  
2019 ◽  
Vol 31 (1) ◽  
pp. 35 ◽  
Author(s):  
Vinh Ngo ◽  
David Castells-Rufas ◽  
Arnau Casadevall ◽  
Marc Codina ◽  
Jordi Carrabina

Pedestrian detection is one of the key problems in the emerging self-driving car industry. In addition, the Histogram of Gradients (HOG) algorithm proved to provide good accuracy for pedestrian detection. Many research works focused on accelerating HOG algorithm on FPGA (Field-Programmable Gate Array) due to its low-power and high-throughput characteristics. In this paper, we present an energy-efficient HOG-based implementation for pedestrian detection system on a low-cost FPGA system-on-chip platform. The hardware accelerator implements the HOG computation and the Support Vector Machine classifier, the rest of the algorithm is mapped to software in the embedded processor. The hardware runs at 50 Mhz (lower frequency than previous works), thus achieving the best pixels processed per clock and the lower power design.


2020 ◽  
Vol 39 (12) ◽  
pp. 6034-6057
Author(s):  
Vitawat Sittakul ◽  
S. Vijayalakshmi ◽  
V. Nagarajan ◽  
K. Sakthidasan Sankaran ◽  
Sakthivel Sankaran

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 70733-70745
Author(s):  
Yumin Liao ◽  
Ningmei Yu ◽  
Dian Tian ◽  
Chen Wang ◽  
Shuaijun Li ◽  
...  

2018 ◽  
Vol 14 (1) ◽  
pp. 129-139 ◽  
Author(s):  
Ali H. Hassan ◽  
Hassan Mostafa ◽  
Yehea Ismail ◽  
Ahmed M. Soliman

Author(s):  
Tusher Chakraborty ◽  
Md. Nasim ◽  
Sakib Md. Bin Malek ◽  
Md. Taksir Hasan Majumder ◽  
Md. Samiul Saeef ◽  
...  

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