Parametric design space exploration for optimizing QAM based high-speed communication

2015 ◽  
Author(s):  
Shalina Percy Delicia George Ford ◽  
Peter Figuli ◽  
Jurgen Becker
Keyword(s):  
High Speed ◽  
Design Space Exploration ◽  
Design Space ◽  
Parametric Design ◽  
Space Exploration

scholarly journals Design space exploration for flexibility assessment and decision making support in integrated industrial building design

2021 ◽  
Author(s):  
Julia Reisinger ◽  
Maximilian Knoll ◽  
Iva Kovacic
Keyword(s):  
Decision Making ◽  
Design Process ◽  
Design Space Exploration ◽  
Design Space ◽  
Parametric Design ◽  
Space Exploration ◽  
Building Design ◽  
Assessment Tools ◽  
Industrial Building ◽  
Industrial Buildings

AbstractIndustrial buildings play a major role in sustainable development, producing and expending a significant amount of resources, energy and waste. Due to product individualization and accelerating technological advances in manufacturing, industrial buildings strive for highly flexible building structures to accommodate constantly evolving production processes. However, common sustainability assessment tools do not respect flexibility metrics and manufacturing and building design processes run sequentially, neglecting discipline-specific interaction, leading to inflexible solutions. In integrated industrial building design (IIBD), incorporating manufacturing and building disciplines simultaneously, design teams are faced with the choice of multiple conflicting criteria and complex design decisions, opening up a huge design space. To address these issues, this paper presents a parametric design process for efficient design space exploration in IIBD. A state-of-the-art survey and multiple case study are conducted to define four novel flexibility metrics and to develop a unified design space, respecting both building and manufacturing requirements. Based on these results, a parametric design process for automated structural optimization and quantitative flexibility assessment is developed, guiding the decision-making process towards increased sustainability. The proposed framework is tested on a pilot-project of a food and hygiene production, evaluating the design space representation and validating the flexibility metrics. Results confirmed the efficiency of the process that an evolutionary multi-objective optimization algorithm can be implemented in future research to enable multidisciplinary design optimization for flexible industrial building solutions.

Design Space Exploration for a Ram Inlet Waterjet for High-Speed Propulsion

2021 ◽  
Author(s):  
Filippo Avanzi ◽  
Ernesto Benini ◽  
Fabio Ruaro ◽  
William Gobbo
Keyword(s):  
High Speed ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration

Enabling parametric design space exploration by non-designers

2020 ◽  
Vol 34 (2) ◽  
pp. 160-175 ◽  
Author(s):  
Eduardo Castro e Costa ◽  
Joaquim Jorge ◽  
Aaron D. Knochel ◽  
José Pinto Duarte
Keyword(s):  
User Interface ◽  
Mass Customization ◽  
Design Space Exploration ◽  
Design Space ◽  
Parametric Design ◽  
Space Exploration ◽  
End Users ◽  
Parametric Models ◽  
Direct Manipulation ◽  
Barycentric Interpolation

AbstractIn mass customization, software configurators enable novice end-users to design customized products and services according to their needs and preferences. However, traditional configurators hardly provide an engaging experience while avoiding the burden of choice. We propose a Design Participation Model to facilitate navigating the design space, based on two modules. Modeler enables designers to create customizable designs as parametric models, and Navigator subsequently permits novice end-users to explore these designs. While most parametric designs support direct manipulation of low-level features, we propose interpolation features to give customers more flexibility. In this paper, we focus on the implementation of such interpolation features into Navigator and its user interface. To assess our approach, we designed and performed user experiments to test and compare Modeler and Navigator, thus providing insights for further developments of our approach. Our results suggest that barycentric interpolation between qualitative parameters provides a more easily understandable interface that empowers novice customers to explore the design space expeditiously.

scholarly journals Performance Driven Design Space Exploration for Multi-Objective Optimization Using Stability in Competition

2021 ◽  
Author(s):  
Summit Sehgal
Keyword(s):  
Real Estate ◽  
Analytical Approach ◽  
Design Space Exploration ◽  
Design Space ◽  
Parametric Design ◽  
Space Exploration ◽  
Systems Development ◽  
Performance Parameters ◽  
Multi Objective Optimization ◽  
Systems Architecture

Multi Parametric Design Space Exploration (DSE) for optimal micro-architecture synthesis is an extremely complex yet crucial stage in embedded systems development. Often it is very time complex to find the best suitable configuration to map the inherently contradictory performance parameters into systems silicon real estate. Owing to its exponentially exploding design space and multi way combinatorial mapping, DSE has proven to be notoriously hard and intractable for VLSI CAD tools. The presented work introduces a highly scalable and generalized analytical approach to identify the best configuration of systems architecture while maintaining prime accuracy resolution. This DSE approach coupled with

scholarly journals Performance Driven Design Space Exploration for Multi-Objective Optimization Using Stability in Competition

2021 ◽  
Author(s):  
Summit Sehgal
Keyword(s):  
Real Estate ◽  
Analytical Approach ◽  
Design Space Exploration ◽  
Design Space ◽  
Parametric Design ◽  
Space Exploration ◽  
Systems Development ◽  
Performance Parameters ◽  
Multi Objective Optimization ◽  
Systems Architecture

Multi Parametric Design Space Exploration (DSE) for optimal micro-architecture synthesis is an extremely complex yet crucial stage in embedded systems development. Often it is very time complex to find the best suitable configuration to map the inherently contradictory performance parameters into systems silicon real estate. Owing to its exponentially exploding design space and multi way combinatorial mapping, DSE has proven to be notoriously hard and intractable for VLSI CAD tools. The presented work introduces a highly scalable and generalized analytical approach to identify the best configuration of systems architecture while maintaining prime accuracy resolution. This DSE approach coupled with

scholarly journals Mapping of Massive Data Processing Systems to FPGA Computers Based on Temporal Partitioning and Design Space Exploration

2007 ◽  
Vol 2 (1) ◽  
pp. 45-54
Author(s):  
Paulo Sérgio Brandão Do Nascimento ◽  
Stelita M. Da Silva ◽  
Jordana L. Seixas ◽  
Remy E. Sant’Anna ◽  
Manoel E. De Lima
Keyword(s):  
Data Processing ◽  
High Speed ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Block Size ◽  
Design Flow ◽  
Massive Data ◽  
Temporal Partitioning ◽  
Massive Data Processing

High parallelism degree is fundamental for high speed massive data processing systems. Modern FPGA devices can provide such parallelism plus flexibility. However, these devices are still limited by their logic block size, memory size, memory bandwidth and configuration time. Temporal partitioning techniques can be a solution for such problems when FPGAs are used to implement large systems. In this case, the system is split into partitions (called contexts), multiplexed in a FPGA, by using reconfiguration techniques. This approach can increase the effective area for system implementation, allowing increase of parallelism in each task that composes the application. However, the necessary reconfiguration time between contexts can cause performance decrease. A possible solution for this is an intensive parallelism exploration of massive data application to compensate for this overhead and improve global performance. This is true for modern FPGA with relatively high reconfiguration speed. In this work, A reconfigurable computer platform and design space exploration techniques are proposed for mapping of such massive data applications, as image processing, in FPGA devices, depending on the application task scheduling. A library with different hardware implementation for a different parallelism degree is used for better adjustment of space/time for each task. Experiments demonstrate the efficiency of this approach when compared to the optimal mapping reached by exhaustive timing search in the complete design space exploration. A design flow is shown based on library components that implements typical tasks used in the domain of applications.

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