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Assembly and reliability assessment of 50µm-thick chip stacking by wafer-level underfill film
2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)
◽
10.1109/impact.2012.6420249
◽
2012
◽
Author(s):
Kuo-Shu Kao
◽
Ren-Shin Cheng
◽
Chau-Jie Zhan
◽
Jing-Yao Chang
◽
Tsung-Fu Yang
◽
...
Keyword(s):
Reliability Assessment
◽
Wafer Level
Download Full-text
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Wafer level reliability assessment of stress-induced voiding
1991 Proceedings Eighth International IEEE VLSI Multilevel Interconnection Conference
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10.1109/vmic.1991.153033
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2002
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Cited By ~ 1
Author(s):
H.H. Hoang
◽
R.B. MacNaughton
◽
Y.S. Lin
◽
M. Zamanian
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F.S. Chen
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Keyword(s):
Reliability Assessment
◽
Wafer Level
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Assessment Of Stress
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Reliability assessment of EPROM memory retention for wafer level sort programming
Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits
◽
10.1109/ipfa.1995.487625
◽
2002
◽
Author(s):
Teong-San Yeoh
◽
Shze-Jer Hu
Keyword(s):
Reliability Assessment
◽
Memory Retention
◽
Wafer Level
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Effectiveness of wafer level test for electromigration wear out reporting in advanced CMOS interconnects reliability assessment
Microelectronic Engineering
◽
10.1016/j.mee.2013.01.022
◽
2013
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Vol 106
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pp. 195-199
◽
Cited By ~ 1
Author(s):
F. Bana
◽
E. Petitprez
◽
D. Ney
◽
L. Arnaud
◽
Y. Wouters
Keyword(s):
Reliability Assessment
◽
Wafer Level
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Fast wafer level reliability assessment of ultra thick oxides under impact ionization conditions
10.1109/irws.2007.4469235
◽
2007
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Cited By ~ 3
Author(s):
A. Aal
Keyword(s):
Impact Ionization
◽
Reliability Assessment
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Wafer Level
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Wafer-level reliability assessment of SiGe NPN HBTs after high temperature electrical operation
IEEE International Integrated Reliability Workshop Final Report 2002 IRWS-02
◽
10.1109/irws.2002.1194238
◽
2003
◽
Cited By ~ 2
Author(s):
K. Hofmann
◽
G. Bruegmann
◽
A. Lill
Keyword(s):
High Temperature
◽
Reliability Assessment
◽
Wafer Level
Download Full-text
Empirical Solutions and Reliability Assessment of Thermal Induced Creep Failure for Wafer Level Packaging
IEEE Transactions on Device and Materials Reliability
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10.1109/tdmr.2018.2887163
◽
2019
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Vol 19
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◽
pp. 126-132
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Cited By ~ 3
Author(s):
P. L. Wu
◽
P. H. Wang
◽
K. N. Chiang
Keyword(s):
Reliability Assessment
◽
Wafer Level
◽
Creep Failure
◽
Wafer Level Packaging
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Electromigration Reliability Assessment of Cu-based Metallization Systems by a Wafer-Level Approach
ECS Transactions
◽
10.1149/1.2767302
◽
2019
◽
Vol 8
(1)
◽
pp. 157-162
Author(s):
Maurizio Impronta
◽
Alessandro Marras
◽
Ilaria De Munari
◽
Andrea Scorzoni
◽
Maria Grazia Valentini
Keyword(s):
Reliability Assessment
◽
Wafer Level
Download Full-text
Thermal cycling reliability assessment and enhancement of embedded wafer level LGA packages for power applications
2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013)
◽
10.1109/eptc.2013.6745792
◽
2013
◽
Author(s):
Yiyi Ma
◽
Kim-Yong Goh
◽
Xueren Zhang
◽
Yonggang Jin
Keyword(s):
Thermal Cycling
◽
Reliability Assessment
◽
Wafer Level
Download Full-text
Study on Reliability Assessment of Wafer Level Package Using Design-on-Simulation with Support Vector Regression Techniques
2020 15th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)
◽
10.1109/impact50485.2020.9268562
◽
2020
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Author(s):
H. C. Kuo
◽
B. R. Lai
◽
K. N. Chiang
Keyword(s):
Support Vector Regression
◽
Reliability Assessment
◽
Support Vector
◽
Wafer Level
◽
Regression Techniques
◽
Wafer Level Package
Download Full-text
Board Level Reliability assessment of Wafer Level Chip Scale Packages for SACQ, a lead-free solder with a novel life prediction model
2018 7th Electronic System-Integration Technology Conference (ESTC)
◽
10.1109/estc.2018.8546504
◽
2018
◽
Author(s):
Balaji Nandhivaram Muthuraman
◽
Baltazar Canete
Keyword(s):
Prediction Model
◽
Life Prediction
◽
Reliability Assessment
◽
Lead Free
◽
Lead Free Solder
◽
Wafer Level
◽
Free Solder
◽
Board Level
◽
Board Level Reliability
◽
Life Prediction Model
Download Full-text
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