Design and experiments of a SiC power MOSFET bidirectional switching power pole

Author(s):  
Hussain Sayed ◽  
Ahmed Zurfi ◽  
Jing Zhang
2013 ◽  
Vol 2013 (1) ◽  
pp. 000770-000775
Author(s):  
Anders Lind

In traditional 3-pin High-Voltage (HV) power MOSFET (MOSFET) packages, the hard-switching transition speed is limited by the package source-inductance because the MOSFET drain current and gate current both share a path through the same package source inductance. The details of this mechanism are discussed and the resulting additional switching power loss caused by it is both measured and simulated. Proposed innovative “Source-Sense” packages split the two currents into separate paths by adding separate source-pin for Kelvin-type driver connection to gate-source on the chip, thus completely eliminating all switching loss incurred by the source inductance for improved efficiency and lower die temperature. Leadless SMD packages employing this method are explored for further addressing complications caused by package source inductance, such as common-mode noise and requirement for filtering. Advanced package concepts are discussed for future optimization and thermal management, and versatility of these advanced concepts as well as existing leadless SMD packages with “Source-Sense” is examined.


Author(s):  
Norimichi Chinone ◽  
Yasuo Cho

Abstract Gate-bias dependent depletion layer distribution and carrier distributions in cross-section of SiC power MOSFET were measured by newly developed measurement system based on super-higher-order scanning nonlinear dielectric microscope. The results visualized gate-source voltage dependent redistribution of depletion layer and carrier.


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