Through-silicon via (TSV) filling with electroplated Cu with short plating times and long bath life remains a challenge within the semiconductor and electronic packaging industries. TSVs are the primary enabler for advanced 3D architectures such as hybrid memory cubes, wide IO DDR memory, as well as chip interconnections through interposers. The TSV needs to be completely filled with void-free Cu for high reliability. Organic additives are used to achieve a bottom-up, superconformal filling profile, required for void-free filling in high aspect ratio vias. The development and selection of the proper organic additives, optimized plating process, and implementation of advanced bath control techniques enable short TSV electroplating times, while also allowing for robust operation and high bath stability. Dow's INTERLINK™ 9200 Cu TSV plating bath with the Applied Materials TSPlus plating system allows 10×100 μm vias to be filled in less than 1 hour and 5×50 μm vias filled in under 20 minutes while having a bath life greater than 40 A hr L-1 in continuous operation. This combination also exhibits low overburden for stress management, CMP cost reductions, and high reliability.
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