A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage

Author(s):  
Daehoon Na ◽  
Jang-woo Lee ◽  
Seon-Kyoo Lee ◽  
Hwasuk Cho ◽  
Junha Lee ◽  
...  
2012 ◽  
Vol 47 (4) ◽  
pp. 981-989 ◽  
Author(s):  
Chulbum Kim ◽  
Jinho Ryu ◽  
Taesung Lee ◽  
Hyunggon Kim ◽  
Jaewoo Lim ◽  
...  

2021 ◽  
Author(s):  
Jisuk Kim ◽  
Earl Kim ◽  
Daehyeon Lee ◽  
Taeheon Lee ◽  
Daesik Ham ◽  
...  

Abstract In the NAND flash manufacturing process, thousands of internal electronic fuses (eFuse) should be tuned in order to optimize performance and validity. In this paper, we propose a machine learning-based optimization technique that can automatically tune the individual eFuse value based on a deep learning and genetic algorithm. Using state-of-the-art triple-level cell (TLC) V-NAND flash wafers, we trained our model and validated its effectiveness. The experimental results show that our technique can automatically optimize NAND flash memory, thus reducing total turnaround time (TAT) by 70 % compared with the manual-based process.


2001 ◽  
Vol 36 (11) ◽  
pp. 1700-1706 ◽  
Author(s):  
Taehee Cho ◽  
Yeong-Taek Lee ◽  
Eun-Cheol Kim ◽  
Jin-Wook Lee ◽  
Sunmi Choi ◽  
...  

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