Reduction of Threshold Voltage by Diffusion Control Technique in p-MISFETs Using Poly-Si/TiN/HfSiON Gate Stacks

2007 ◽  
Vol 28 (10) ◽  
pp. 868-870
Author(s):  
Takaaki Kawahara ◽  
Yukio Nishida ◽  
Shinsuke Sakashita ◽  
Masaharu Mizutani ◽  
Masao Inoue ◽  
...  
2005 ◽  
Vol 26 (8) ◽  
pp. 553-556 ◽  
Author(s):  
Xuguang Wang ◽  
J. Peterson ◽  
P. Majhi ◽  
M.I. Gardner ◽  
Dim-Lee Kwong

2013 ◽  
Vol 765-767 ◽  
pp. 2534-2537
Author(s):  
Yun Wu Zhang ◽  
Jing Zhu ◽  
Wei Feng Sun

A novel Under Voltage Lockout (UVLO) circuit featuring with fast response speed and low temperature coefficient threshold voltages is proposed in this paper. Compared with the conventional structure, the proposed circuit achieves the fast response ability thanks to the current-mode control technique is utilized. Meanwhile, this UVLO realizes hysteretic threshold by a feedback control path to improve the interference rejection capability. In addition, the threshold voltage varies slightly with the variation of the supply voltage and temperature by using a bandgap core. The proposed circuit implemented with 0.5μm BCD technology has an input high threshold voltage of 8.5V and a hysteresis of 1.5V, and start or shut off the power quickly. Test results verified that the proposed UVLO has the qualification to be applied to DC-DC converters.


2017 ◽  
Vol 129 ◽  
pp. 52-60 ◽  
Author(s):  
Miao Xu ◽  
Huilong Zhu ◽  
Yanbo Zhang ◽  
Qiuxia Xu ◽  
Yongkui Zhang ◽  
...  

2005 ◽  
Author(s):  
Kenzo Manabe ◽  
Kensuke Takahashi ◽  
Takashi Hase ◽  
Nobuyuki Ikarashi ◽  
Makiko Oshida ◽  
...  

2006 ◽  
Author(s):  
S. Sakashita ◽  
T. Kawahara ◽  
M. Mizutani ◽  
M. Inoue ◽  
K. Mori ◽  
...  

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