AbstractIn this paper, various approaches to extend scalability of Hafnium-based dielectrics are reported. Among the three crystal phases of HfO2 (monoclinic, cubic and tetragonal), the tetragonal phase has been reported to have the highest dielectric constant. Tetragonal phase stabilization by crystallizing the thin HfO2 using a metal capping layer and by adding zirconium is demonstrated. The microstructure, morphology, optical properties and impurities of HfxZr1-xO2 dielectrics (for 0<x<1) are discussed. Subtle but important modification to high-k / Si interface characteristics resulting from addition of Zr into HfO2 is reported. To further boost the dielectric constant of hafnium-based dielectrics, incorporation of TiO2, which has been reported to have high dielectric constant, is explored. HfxZr1-xO2/TiO2 bilayer films were fabricated. 30 Å TiO2 films were deposited on a 5, 8, 12 or 15 Å HfxZr1-xO2 underlayer to determine the minimum thickness needed to maintain good thermal stability with Si substrate. CV and IV results indicated that 12-15 Å is the optimal thickness range for the HfxZr1-xO2 underlayer. A dielectric constant as high as 150 for TiO2 layer is extracted from TiO2 thickness series deposited on12 Å HfxZr1-xO2 underlayer. In addition to increasing the k-value of Hafnium-based dielectrics, it is important that the threshold voltage of these high-k devices is low. Here we report the use of thin Al2O3 capping layers to modulate PMOS threshold voltages. About 100 mV reduction in threshold voltage is achieved by capping HfO2 with a 5Å Al2O3 film. Finally, dielectric scaling by modifying the Si/high-k interfacial layer is attempted. Nitrogen incorporation into HfxZr1-xO2 is shown to be a simple and effective method to lower the capacitance equivalent thickness (CET) of Hafnium-based dielectrics.
Threshold voltage and DIBL effect analysis and modeling for FD-SOI MOSFET with high k + SiO$_2$ gate
