Reconfigurable logic-memory hybrid device based on ferroelectric Hf0.5Zr0.5O2

AbstractWe consider transport properties of a hybrid device composed by a quantum dot placed between normal and superconducting reservoirs, and coupled to a Majorana nanowire: a topological superconducting segment hosting Majorana bound states (MBSs) at the opposite ends. It is demonstrated that if highly nonlocal and nonoverlapping MBSs are formed in the system, the zero-bias Andreev conductance through the dot exhibits characteristic isoconductance profiles with the shape depending on the spin asymmetry of the coupling between the dot and the topological superconductor. Otherwise, for overlapping MBSs with less degree of nonlocality, the conductance is insensitive to the spin polarization and the isoconductance signatures disappear. This allows to propose an alternative experimental protocol for probing the nonlocality of the MBSs in Majorana nanowires.

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Real-time, High-resolution Depth Upsampling on Embedded Accelerators

ACM Transactions on Embedded Computing Systems ◽

10.1145/3436878 ◽

2021 ◽

Vol 20 (3) ◽

pp. 1-22

Author(s):

David Langerman ◽

Alan George

Keyword(s):

High Resolution ◽

Low Power ◽

Real Time ◽

Mixed Reality ◽

Graphics Processing Unit ◽

Processing Unit ◽

Reconfigurable Logic ◽

Depth Sensors ◽

Time Requirements ◽

Graphics Processing

High-resolution, low-latency apps in computer vision are ubiquitous in today’s world of mixed-reality devices. These innovations provide a platform that can leverage the improving technology of depth sensors and embedded accelerators to enable higher-resolution, lower-latency processing for 3D scenes using depth-upsampling algorithms. This research demonstrates that filter-based upsampling algorithms are feasible for mixed-reality apps using low-power hardware accelerators. The authors parallelized and evaluated a depth-upsampling algorithm on two different devices: a reconfigurable-logic FPGA embedded within a low-power SoC; and a fixed-logic embedded graphics processing unit. We demonstrate that both accelerators can meet the real-time requirements of 11 ms latency for mixed-reality apps. 1

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Novel CNTFET-based reconfigurable logic gate design

2007 44th ACM/IEEE Design Automation Conference ◽

10.1145/1278480.1278551 ◽

2007 ◽

Cited By ~ 1

Author(s):

J. Liu ◽

I. O'Connor ◽

D. Navarro ◽

F. Gaffiot

Keyword(s):

Logic Gate ◽

Reconfigurable Logic ◽

Gate Design

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Enhancing SAT-Attack Resiliency and Cost-Effectiveness of Reconfigurable-Logic-Based Circuit Obfuscation

2021 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas51556.2021.9401458 ◽

2021 ◽

Author(s):

Subhajit Dutta Chowdhury ◽

Gengyu Zhang ◽

Yinghua Hu ◽

Pierluigi Nuzzo

Keyword(s):

Cost Effectiveness ◽

Reconfigurable Logic

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Design of 3D Additively Manufactured Hybrid Structures for Cranioplasty

Materials ◽

10.3390/ma14010181 ◽

2021 ◽

Vol 14 (1) ◽

pp. 181

Author(s):

Roberto De Santis ◽

Teresa Russo ◽

Julietta V. Rau ◽

Ida Papallo ◽

Massimo Martorelli ◽

...

Keyword(s):

Physical Models ◽

Cranial Bone ◽

Head Model ◽

Rigid Sphere ◽

Element Analysis ◽

Aliphatic Polyesters ◽

Hybrid Device ◽

Wide Range ◽

Hybrid Devices ◽

Technical Solutions

A wide range of materials has been considered to repair cranial defects. In the field of cranioplasty, poly(methyl methacrylate) (PMMA)-based bone cements and modifications through the inclusion of copper doped tricalcium phosphate (Cu-TCP) particles have been already investigated. On the other hand, aliphatic polyesters such as poly(ε-caprolactone) (PCL) and polylactic acid (PLA) have been frequently investigated to make scaffolds for cranial bone regeneration. Accordingly, the aim of the current research was to design and fabricate customized hybrid devices for the repair of large cranial defects integrating the reverse engineering approach with additive manufacturing, The hybrid device consisted of a 3D additive manufactured polyester porous structures infiltrated with PMMA/Cu-TCP (97.5/2.5 w/w) bone cement. Temperature profiles were first evaluated for 3D hybrid devices (PCL/PMMA, PLA/PMMA, PCL/PMMA/Cu-TCP and PLA/PMMA/Cu-TCP). Peak temperatures recorded for hybrid PCL/PMMA and PCL/PMMA/Cu-TCP were significantly lower than those found for the PLA-based ones. Virtual and physical models of customized devices for large cranial defect were developed to assess the feasibility of the proposed technical solutions. A theoretical analysis was preliminarily performed on the entire head model trying to simulate severe impact conditions for people with the customized hybrid device (PCL/PMMA/Cu-TCP) (i.e., a rigid sphere impacting the implant region of the head). Results from finite element analysis (FEA) provided information on the different components of the model.

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