High-voltage SiC p-channel insulated-gate bipolar transistors (p-IGBT) utilizing current-spreading layer (CSL) formed by ion implantation are fabricated and their properties characterized. A high blocking voltage of 15 kV is achieved at room temperature by optimizing the JFET length. An ampere-class p-IGBT exhibited a low forward voltage drop of 8.5 V at 100 A/cm2 and a low differential specific on-resistance of 33 mΩ cm2 at 250 °C, while these values were high at room temperature. For further reduction of the forward voltage drop in the on-state and temperature stability, the temperature dependence of the JFET effect and carrier lifetime in p-IGBTs are investigated. Optimization of the JFET length using an epitaxial CSL, instead of applying ion implantation and lifetime enhancement, could lead to a further reduction of the forward voltage drop.
Transient voltage overshoots of high voltage ESD protections based on bipolar transistors in smart power technology