An ultra-low-power analog memory system with an adaptive sampling rate

Abstract. In this work, we developed and characterised an autonomous micro-platform including several types of sensors, an advanced power management unit (PMU) and radio frequency (RF) transmission capabilities. Autonomy requires integration of an energy harvester, an energy storage device, a PMU, ultra-low-power components (including sensors) and optimized software. Our choice was to use commercial off-the-shelf components with low-power consumption, low cost and compactness as selection criteria. For the multi-purpose micro-platform, we choose to include the most common sensors (such as temperature, humidity, luminosity, acceleration, etc.) and to integrate them in one miniaturised autonomous device. A processing unit is embedded in the system. It allows for data acquisition from each sensor individually, simple data processing, and storing and/or wireless data transmission. Such a system can be used as stand-alone, with an internal storage in a non-volatile memory, or as a node in a wireless network, with bi-directional communication with a hub device where data can be analysed further. According to specific application requirements, system settings can be adjusted, such as the sampling rate, the resolution and the processing of the sensor data. Parallel to full autonomous functionality, the low-power design enables us to power the system by a small battery leading to a high degree of autonomy at a high sampling rate. Therefore, we also developed an alternative battery-powered version of the micro-platform that increases the range of applications. As such, the system is highly versatile and due to its reduced dimensions, it can be used nearly everywhere. Typical applications include the Internet of Things, Industry 4.0, home automation and building structural health monitoring.

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A 30 μW Embedded Real-Time Cetacean Smart Detector

Electronics ◽

10.3390/electronics10070819 ◽

2021 ◽

Vol 10 (7) ◽

pp. 819

Author(s):

Sebastián Marzetti ◽

Valentin Gies ◽

Paul Best ◽

Valentin Barchasz ◽

Sébastien Paris ◽

...

Keyword(s):

Power Consumption ◽

Low Power ◽

Data Storage ◽

High Performance ◽

Sampling Rate ◽

Detection Accuracy ◽

Sperm Whales ◽

Recording Equipment ◽

Battery Cell ◽

Ultra Low Power

Cetacean monitoring is key to their protection. Understanding their behavior relies on multi-channel and high-sampling-rate underwater acoustic recordings for identifying and tracking them in a passive way. However, a lot of energy and data storage is required, requiring frequent human maintenance operations. To cope with these constraints, an ultra-low power mixed-signal always-on wake-up is proposed. Based on pulse-pattern analysis, it can be used for triggering a multi-channel high-performance recorder only when cetacean clicks are detected, thus increasing autonomy and saving storage space. This detector is implemented as a mixed architecture making the most of analog and digital primitives: this combination drastically improves power consumption by processing high-frequency data using analog features and lower-frequency ones in a digital way. Furthermore, a bioacoustic expert system is proposed for improving detection accuracy (in ultra-low-power) via state machines. Power consumption of the system is lower than 30 μW in always-on mode, allowing an autonomy of 2 years on a single CR2032 battery cell with a high detection accuracy. The receiver operating characteristic (ROC) curve obtained has an area under curve of 85% using expert rules and 75% without it. This implementation provides an excellent trade-off between detection accuracy and power consumption. Focused on sperm whales, it can be tuned to detect other species emitting pulse trains. This approach facilitates biodiversity studies, reducing maintenance operations and allowing the use of lighter, more compact and portable recording equipment, as large batteries are no longer required. Additionally, recording only useful data helps to reduce the dataset labeling time.

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Adaptive Sampling for Ultra-Low-Power Electrocardiogram (ECG) Readouts

Analog-and-Algorithm-Assisted Ultra-low Power Biosignal Acquisition Systems - Analog Circuits and Signal Processing ◽

10.1007/978-3-030-05870-8_2 ◽

2019 ◽

pp. 11-31 ◽

Cited By ~ 1

Author(s):

Venkata Rajesh Pamula ◽

Chris Van Hoof ◽

Marian Verhelst

Keyword(s):

Low Power ◽

Adaptive Sampling ◽

Ultra Low Power ◽

Electrocardiogram Ecg

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Energy and time-efficient circuitry of bat-bootstrap and comp-lifier for ultra-low power SAR-ADC

Circuit World ◽

10.1108/cw-11-2020-0312 ◽

2021 ◽

Vol ahead-of-print (ahead-of-print) ◽

Author(s):

Muhammad Yasir Faheem ◽

Shun'an Zhong ◽

Muhammad Basit Azeem ◽

Xinghua Wang

Keyword(s):

Low Power ◽

Supply Voltage ◽

Sampling Rate ◽

Sar Adc ◽

Oxide Semiconductor ◽

Bone Block ◽

Technological Advancement ◽

Left Wing ◽

Ultra Low Power ◽

Content Type

Purpose Successive Approximation Register-Analog to Digital Converter (SAR-ADC) has been achieved notable technological advancement since the past couple of decades. However, it’s not accurate in terms of size, energy, and time consumption. Many projects proposed to make it energy efficient and time-efficient. Such designs are unable to deliver two parallel outputs. Design/methodology/approach To this end, this study introduced an ultra-low-power circuitry for the two blocks (bootstrap and comparator) of 11-bit SAR-ADC. The bootstrap has three sub-parts: back-bone, left-wing and right-wing, named as bat-bootstrap. The comparator block has a circuitry of the two comparators and an amplifier, named as comp-lifier. In a bat-bootstrap, the authors plant two capacitors in the back-bone block to avoid the patristic capacitance. The switching system of the proposed design highly synchronized with the short pulses of the clocks for high accuracy. This study simulates the proposed circuits using a built-in Cadence 90 nm Complementary Metal Oxide Semiconductor library. Findings The results suggested that the response time of two bat-bootstrap wings and comp-lifier are 80 ns, 120 ns, and 90 ns, respectively. The supply voltage is 0.7 V, wherever the power consumption of bat-bootstrap, comp-lifier and SAR-ADC are 0.3561µW, 0.257µW and 35.76µW, respectively. Signal to Noise and Distortion Ratio is 65 dB with 5 MHz frequency and 25 KS/s sampling rate. The input referred noise of the amplifier and two comparators are 98µVrms, 224µVrms and 224µVrms, respectively. Originality/value Two basic circuit blocks for SAR-ADC are introduced, which fulfill the duality approach and delivered two outputs with highly synchronized clock pulses. The circuit sharing concept introduced for the high performance SAR-ADCs.

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