Two-dimensional analysis of carrier distribution in phosphorus-implanted emitter and phosphorus-diffused emitter using super-higher-order scanning nonlinear dielectric microscopy

2017 ◽  
Author(s):  
Kotaro Hirose ◽  
Katsuto Tanahashi ◽  
Hidetaka Takato ◽  
Norimichi Chinone ◽  
Yasuo Cho
Keyword(s):  
Dimensional Analysis ◽  
Higher Order ◽  
Two Dimensional ◽  
Carrier Distribution ◽  
Nonlinear Dielectric

Two-Dimensional Local Deep-Level Transient Spectroscopy Imaging Using Super-Higher-Order Scanning Nonlinear Dielectric Microscopy

2016 ◽  
Author(s):  
N. Chinone ◽  
Y. Cho ◽  
R. Kosugi ◽  
Y. Tanaka ◽  
S. Harada ◽  
...  
Keyword(s):  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Higher Order ◽  
Trap Density ◽  
New Technique ◽  
Two Dimensional ◽  
Nonlinear Dielectric ◽  
Annealing Conditions ◽  
Transient Spectroscopy ◽  
A New Technique

Abstract A new technique for local deep level transient spectroscopy (DLTS) imaging using super-higher-order scanning nonlinear dielectric microscopy is proposed. Using this technique. SiCVSiC structure samples with different post oxidation annealing conditions were measured. We observed that the local DLTS signal decreases with post oxidation annealing (POA), which agrees with the well-known phenomena that POA reduces trap density. Furthermore, obtained local DLTS images had dark and bright areas, which is considered to show the trap distribution at/near SiCVSiC interface.

Evaluation of Power SiC-MOSFET Using Super-Higher-Order Scanning Nonlinear Dielectric Microscopy—Imaging of Carrier Distribution and Depletion Layer

2014 ◽  
Author(s):  
N. Chinone ◽  
Y. Cho ◽  
T. Nakamura
Keyword(s):  
Semiconductor Device ◽  
Low Cost ◽  
Semiconductor Devices ◽  
Higher Order ◽  
Depletion Layer ◽  
Dopant Distribution ◽  
Carrier Distribution ◽  
Microscopy Imaging ◽  
Nonlinear Dielectric ◽  
Power Semiconductor

Abstract Evaluation techniques for semiconductor devices are keys for device development with low cost and short time to market. Especially, dopant and depletion layer distribution in devices is a critical electrical property that needs to be evaluated. Super-higher-order nonlinear dielectric microscopy (SHOSNDM) is one of the promising techniques for semiconductor device evaluation. We developed a method for imaging detailed dopant distribution and depletion layers in semiconductor devices using SHO-SNDM. As a demonstration, a cross-section of a SiC power semiconductor device was measured by this method and detailed dopant distribution and depletion layer distributions were imaged.

Two-Dimensional Imaging of Trap Distribution in SiO2/SiC Interface Using Local Deep Level Transient Spectroscopy Based on Super-Higher-Order Scanning Nonlinear Dielectric Microscopy

2017 ◽  
Vol 897 ◽  
pp. 127-130
Author(s):  
Norimichi Chinone ◽  
Ryoji Kosugi ◽  
Yasunori Tanaka ◽  
Shinsuke Harada ◽  
Hajime Okumura ◽  
...  
Keyword(s):  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Higher Order ◽  
Trap Density ◽  
New Technique ◽  
Two Dimensional ◽  
Nonlinear Dielectric ◽  
Transient Spectroscopy ◽  
A New Technique

A new technique for local deep level transient spectroscopy (DLTS) imaging using super-higher-order scanning nonlinear dielectric microscopy is proposed. Using this technique, SiO2/SiC structure samples with different post oxidation annealing (POA) conditions were measured. We observed that the local DLTS signal decreases with POA levels, which agrees with the well-known phenomena that POA reduces trap density. Furthermore, obtained local DLTS images had dark and bright areas, which is considered to show the trap distribution at/near SiO2/SiC interface.

Carrier Redistribution Analysis of Gate-Biased SiC Power-MOSFET Using Super-Higher-Order Scanning Nonlinear Dielectric Microscopy

2015 ◽  
Author(s):  
Norimichi Chinone ◽  
Yasuo Cho
Keyword(s):  
Cross Section ◽  
Measurement System ◽  
Higher Order ◽  
Depletion Layer ◽  
Gate Bias ◽  
Power Mosfet ◽  
Nonlinear Dielectric ◽  
Voltage Dependent ◽  
Carrier Redistribution ◽  
Source Voltage

Abstract Gate-bias dependent depletion layer distribution and carrier distributions in cross-section of SiC power MOSFET were measured by newly developed measurement system based on super-higher-order scanning nonlinear dielectric microscope. The results visualized gate-source voltage dependent redistribution of depletion layer and carrier.

Carrier Profiling of the 10-nm-order Structure in a 3D Flash Memory Cell Using Scanning Nonlinear Dielectric Microscopy

2019 ◽  
Author(s):  
Jun Hirota ◽  
Ken Hoshino ◽  
Tsukasa Nakai ◽  
Kohei Yamasue ◽  
Yasuo Cho
Keyword(s):  
Spatial Resolution ◽  
Flash Memory ◽  
Analytical Techniques ◽  
Memory Cell ◽  
Memory Device ◽  
Floating Gate ◽  
Order Structure ◽  
Carrier Distribution ◽  
Nonlinear Dielectric ◽  
Flash Memory Cell

Abstract In this paper, the authors report their successful attempt to acquire the scanning nonlinear dielectric microscopy (SNDM) signals around the floating gate and channel structures of the 3D Flash memory device, utilizing the custom-built SNDM tool with a super-sharp diamond tip. The report includes details of the SNDM measurement and process involved in sample preparation. With the super-sharp diamond tips with radius of less than 5 nm to achieve the supreme spatial resolution, the authors successfully obtained the SNDM signals of floating gate in high contrast to the background in the selected areas. They deduced the minimum spatial resolution and seized a clear evidence that the diffusion length differences of the n-type impurity among the channels are less than 21 nm. Thus, they concluded that SNDM is one of the most powerful analytical techniques to evaluate the carrier distribution in the superfine three dimensionally structured memory devices.

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