A 56-ps multi-phase clock time-to-digital convertor based on Artix-7 FPGA

2014 19th IEEE-NPSS Real Time Conference ◽

10.1109/rtc.2014.7097544 ◽

2014 ◽

Author(s):

Tian Xiang ◽

Lei Zhao ◽

Xi Jin ◽

Tianqi Wang ◽

Shaoping Chu ◽

...

Keyword(s):

Phase Clock ◽

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A Multi-phase Clock Time-to-Digital Convertor Based on ISERDES Architecture

2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines ◽

10.1109/fccm.2014.22 ◽

2014 ◽

Author(s):

Tian Xiang ◽

Lei Zhao ◽

Xi Jin ◽

Tianqi Wang ◽

Shaoping Chu ◽

...

Keyword(s):

Phase Clock ◽

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A high resolution multi-phase clock Time-Digital Convertor implemented on Kintex-7 FPGA

Journal of Instrumentation ◽

10.1088/1748-0221/15/11/t11005 ◽

2020 ◽

Vol 15 (11) ◽

pp. T11005-T11005

Author(s):

X. Dong ◽

C. Ma ◽

X. Zhao ◽

X. Li ◽

Z. Huang

Keyword(s):

High Resolution ◽

Phase Clock ◽

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CMOS digital duty cycle correction circuit for multi-phase clock

Electronics Letters ◽

10.1049/el:20030908 ◽

2003 ◽

Vol 39 (19) ◽

pp. 1383 ◽

Author(s):

Y.C. Jang ◽

S.J. Bae ◽

H.J. Park

Keyword(s):

Phase Clock ◽

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A low-jitter skew-calibrated multi-phase clock generator for time-interleaved applications

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) ◽

10.1109/isscc.2001.912690 ◽

2002 ◽

Author(s):

Lin Wu ◽

W.C. Black

Keyword(s):

Clock Generator ◽

Phase Clock ◽

Multi Phase ◽

Time Interleaved

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Global Multiple-Valued Clock Approach for High- Performance Multi-phase Clock Integrated Circuits

2012 IEEE 42nd International Symposium on Multiple-Valued Logic ◽

10.1109/ismvl.2012.30 ◽

2012 ◽

Author(s):

R. P. Menon ◽

M. A. Thornton

Keyword(s):

Integrated Circuits ◽

High Performance ◽

Phase Clock ◽

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A Widely Linear, Power Efficient, Charge Controlled Delay Element for Multi-phase Clock Generation in 1.2 V, 65 nm CMOS

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_18 ◽

2019 ◽

pp. 202-214

Author(s):

Raviteja Kammari ◽

Vijaya Sankara Rao Pasupureddi

Keyword(s):

Delay Element ◽

Power Efficient ◽

Clock Generation ◽

Efficient Charge ◽

Phase Clock ◽

Multi Phase ◽

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A multi-phase clock generator for high accuracy fully differential switched capacitor readout circuit

2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC) ◽

10.1109/edssc.2017.8126559 ◽

2017 ◽

Author(s):

Xinquan Lai ◽

Kai Zhang ◽

Chen Liu ◽

Yuheng Wang ◽

Longjie Zhong ◽

...

Keyword(s):

High Accuracy ◽

Switched Capacitor ◽

Readout Circuit ◽

Clock Generator ◽

Fully Differential ◽

Phase Clock ◽

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An 8.8-GS/s 6-bit CMOS Time-Interleaved Flash Analog-to-Digital Converter with Multi-Phase Clock Generator

IEICE Transactions on Electronics ◽

10.1093/ietele/e90-c.6.1156 ◽

2007 ◽

Vol E90-C (6) ◽

pp. 1156-1164 ◽

Author(s):

Y.-C. JANG ◽

J.-H. BAE ◽

S.-H. PARK ◽

J.-Y. SIM ◽

H.-J. PARK

Keyword(s):

Clock Generator ◽

Analog To Digital Converter ◽

Digital Converter ◽

Analog To Digital ◽

Phase Clock ◽

Multi Phase ◽

Time Interleaved

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A 1.0Gb/s/ch Clock-shared differential signaling(CSDS) Tx using termination resistance tuning and multi-phase clock spreading for EMI reduction

2010 IEEE Asian Solid-State Circuits Conference ◽

10.1109/asscc.2010.5716567 ◽

2010 ◽

Author(s):

Kyoung-Hoi Koo ◽

Jaejin Park ◽

Donguk Park ◽

Eon-Guk Kim ◽

Seungho Lee ◽

...

Keyword(s):

Differential Signaling ◽

Phase Clock ◽

Multi Phase ◽

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A high-resolution time-to-digital converter based on multi-phase clock implement in field-programmable-gate-array

2012 18th IEEE-NPSS Real Time Conference ◽

10.1109/rtc.2012.6418217 ◽

2012 ◽

Author(s):

Zhoujiancheng Yin ◽

Shubin Liu ◽

Xinjun Hao ◽

Shanshan Gao ◽

Qi An

Keyword(s):

High Resolution ◽

Field Programmable Gate Array ◽

Digital Converter ◽

Resolution Time ◽

Time To Digital Converter ◽

Field Programmable ◽

Phase Clock ◽

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