Integrated Transimpedance Amplifiers Dedicated to Low-Noise and Low-Power Biomedical Applications

2013 ◽  
Author(s):  
E. Kamrani ◽  
A. Chaddad ◽  
F. Lesage ◽  
M. Sawan
Keyword(s):  
Low Power ◽  
Biomedical Applications ◽  
Low Noise ◽  
Transimpedance Amplifiers

A Low-Noise, Low-Power, Wide Dynamic Range Logarithmic Amplifier for Biomedical Applications

2018 ◽  
Vol 27 (07) ◽  
pp. 1850104 ◽  
Author(s):  
Yuwadee Sundarasaradula ◽  
Apinunt Thanachayanont
Keyword(s):  
Low Power ◽  
Biomedical Applications ◽  
Dynamic Range ◽  
Supply Voltage ◽  
Low Noise ◽  
Power Supply Voltage ◽  
Wide Dynamic Range ◽  
Dc Offset ◽  
Limiting Amplifier ◽  
Logarithmic Amplifier

This paper presents the design and realization of a low-noise, low-power, wide dynamic range CMOS logarithmic amplifier for biomedical applications. The proposed amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. A DC offset cancellation feedback loop is used to prevent output saturation and deteriorated input sensitivity from inherent DC offset voltages. The proposed logarithmic amplifier was designed and fabricated in a standard 0.18[Formula: see text][Formula: see text]m CMOS technology. The prototype chip includes six limiting amplifier stages and an on-chip bias generator, occupying a die area of 0.027[Formula: see text]mm2. The overall circuit consumes 9.75[Formula: see text][Formula: see text]W from a single 1.5[Formula: see text]V power supply voltage. Measured results showed that the prototype logarithmic amplifier exhibited an 80[Formula: see text]dB input dynamic range (from 10[Formula: see text][Formula: see text]V to 100[Formula: see text]mV), a bandwidth of 4[Formula: see text]Hz–10[Formula: see text]kHz, and a total input-referred noise of 5.52[Formula: see text][Formula: see text]V.

scholarly journals High-Performance BiCMOS Transimpedance Amplifiers for Fiber-Optic Receivers

2007 ◽  
Vol 4 (1) ◽  
pp. 69
Author(s):  
F. Touati ◽  
M. Loulou
Keyword(s):  
Low Power ◽  
Detailed Analysis ◽  
Process Parameters ◽  
High Performance ◽  
Fiber Optic ◽  
High Gain ◽  
Low Noise ◽  
Transimpedance Amplifier ◽  
Transimpedance Amplifiers ◽  
Simulated Performance

High gain, wide bandwidth, low noise, and low-power transimpedance amplifiers based on new BiCMOS common- base topologies have been designed for fiber-optic receivers. In particular a design approach, hereafter called "A more- FET approach", added a new dimension to effectively optimize performance tradeoffs inherent in such circuits. Using conventional silicon 0.8 μm process parameters, simulated performance features of a total-FET transimpedance amplifier operating at 7.2 GHz, which is close to the technology fT of 12 GHz, are presented. The results are superior to those of similar recent designs and comparable to IC designs using GaAs technology. A detailed analysis of the design architecture, including a discussion on the effects of moving toward more FET-based designs is presented. 

scholarly journals Design and Optimization of a Low Power Pressure Sensor for Wireless Biomedical Applications

2015 ◽  
Vol 2015 ◽  
pp. 1-13 ◽  
Author(s):  
J. Sosa ◽  
Juan A. Montiel-Nelson ◽  
R. Pulido ◽  
Jose C. Garcia-Montesdeoca
Keyword(s):  
Blood Pressure ◽  
Power Consumption ◽  
Low Power ◽  
Pressure Sensor ◽  
Biomedical Applications ◽  
Pressure Sensors ◽  
High Sensitivity ◽  
Cmos Technology ◽  
Low Noise ◽  
Least Significant Bit

A blood pressure sensor suitable for wireless biomedical applications is designed and optimized. State-of-the-art blood pressure sensors based on piezoresistive transducers in a full Wheatstone bridge configuration use low ohmic values because of relatively high sensitivity and low noise approach resulting in high power consumption. In this paper, the piezoresistance values are increased in order to reduce by one order of magnitude the power consumption in comparison with literature approaches. The microelectromechanical system (MEMS) pressure sensor, the mixed signal circuits signal conditioning circuitry, and the successive approximation register (SAR) analog-to-digital converter (ADC) are designed, optimized, and integrated in the same substrate using a commercial 1 μm CMOS technology. As result of the optimization, we obtained a digital sensor with high sensitivity, low noise (0.002 μV/Hz), and low power consumption (358 μW). Finally, the piezoresistance noise does not affect the pressure sensor application since its value is lower than half least significant bit (LSB) of the ADC.

A Low Power and Low Noise On-Chip Active RF Tracking Filter for Digital TV Tuner ICs

2011 ◽  
Vol E94-C (10) ◽  
pp. 1698-1701
Author(s):  
Yang SUN ◽  
Chang-Jin JEONG ◽  
In-Young LEE ◽  
Sang-Gug LEE
Keyword(s):  
Low Power ◽  
Digital Tv ◽  
Low Noise ◽  
On Chip ◽  
Tracking Filter
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