A low-power ASIC containing 10 analog-to-digital converters and buffer memory

2015 ◽  
Author(s):  
Yury Bocharov ◽  
Vladimir Butuzov
Keyword(s):  
Low Power ◽  
Analog To Digital Converters ◽  
Analog To Digital ◽  
Buffer Memory

scholarly journals Low-Power and Low-Voltage Analog-to-Digital Converters for wearable EEG systems

10.5772/7875 ◽  
2009 ◽  
Author(s):  
J. M. Garciacutea Gonzaacutelez ◽  
E. Loacutepez-Morillo ◽  
F. Muntildeoz ◽  
H. ElGmili ◽  
R.G. Carvajal
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Analog To Digital Converters ◽  
Analog To Digital ◽  
Wearable Eeg

Compact Low-Power Analog-to-Digital Converters using Multi-State Spatial Wavefunction-Switched (SWS) FETs

2014 ◽  
Vol 23 (01n02) ◽  
pp. 1450005
Author(s):  
Murali Lingalugari ◽  
John Chandy ◽  
Faquir Jain ◽  
El-Sayed Hasaneen ◽  
Evan Heller
Keyword(s):  
Low Power ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Analog To Digital Converters ◽  
Data Conversion ◽  
Low Power Consumption ◽  
Quantum Mechanical ◽  
Multiple Quantum ◽  
Analog To Digital ◽  
Electron Wavefunction

In this paper, we propose a new architecture for analog-to-digital converters (ADCs) using multistate spatial wavefunction-switched field-effect transistors (SWSFETs). SWSFETs are multiple quantum coupled well devices, where the wells are stacked vertically and the electron wavefunction switches from one well to another with the change in gate voltage. Quantum mechanical simulations of 3-well InGaAs-AlInAs SWSFET structures are presented. The designs and simulations of 2-bit and 3-bit ADCs using SWSFETs result in low power consumption and reduced device count which improves the speed of the data conversion.

scholarly journals Analog to Digital Converters (ADC): A Literature Review

2020 ◽  
Vol 184 ◽  
pp. 01025
Author(s):  
Hemlata Dalmia ◽  
Sanjeet K. Sinha
Keyword(s):  
Signal Processing ◽  
Low Power ◽  
Communication Technology ◽  
High Performance ◽  
Reducing Power ◽  
Digital Signal ◽  
Analog To Digital Converters ◽  
Analog To Digital ◽  
Cmos Scaling ◽  
Analog To Digital Conversion

The signal processing is advancing day by day as its needs and in wireline/wireless communication technology from 2G to 4G cellular communication technology with CMOS scaling process. In this context the high-performance ADCs, analog to digital converters have snatched the attention in the field of digital signal processing. The primary emphasis is on low power approaches to circuits, algorithms and architectures that apply to wireless systems. Different techniques are used for reducing power consumption by using low power supply, reduced threshold voltage, scaling of transistors, etc. In this paper, we have discussed the different types and different techniques used for analog to digital conversion of signals considering several parameters.

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