Field Effect Resistor, a single-device-at-pad solution for ESD protection in deeply scaled SOI technology

2010 ◽  
Author(s):  
Shuqing Cao ◽  
Akram A. Salman ◽  
Jung-Hoon Chun ◽  
Stephen G. Beebe ◽  
Mario M. Pelella ◽  
...  
Keyword(s):  
Field Effect ◽  
Esd Protection ◽  
Soi Technology

Gate-controlled field-effect diodes and silicon-controlled rectifier for charged-device model ESD protection in advanced SOI technology

2011 ◽  
Vol 51 (4) ◽  
pp. 756-764 ◽  
Author(s):  
Shuqing Cao ◽  
Jung-Hoon Chun ◽  
Akram A. Salman ◽  
Stephen G. Beebe ◽  
Robert W. Dutton
Keyword(s):  
Field Effect ◽  
Device Model ◽  
Charged Device Model ◽  
Esd Protection ◽  
Charged Device ◽  
Soi Technology

Field effect diode for effective CDM ESD protection in 45 nm SOI technology

2009 ◽  
Author(s):  
Shuqing Cao ◽  
Stephen G. Beebe ◽  
Akram A. Salman ◽  
Mario M. Pelella ◽  
Jung-Hoon Chun ◽  
...  
Keyword(s):  
Field Effect ◽  
Esd Protection ◽  
Soi Technology

AN IMPROVED DIFFERENTIAL COMPARATOR WITH FIELD EFFECT DIODE OUTPUT STAGE

2005 ◽  
Vol 14 (05) ◽  
pp. 931-937 ◽  
Author(s):  
IRAJ SHEIKHIAN ◽  
FARSHID RAISSI
Keyword(s):  
Field Effect ◽  
Output Stage ◽  
Chip Area ◽  
The Third ◽  
Large Current ◽  
The Third Terminal ◽  
On Line ◽  
Soi Technology

In a field effect diode, carriers of a p–n junction can be modulated on-line. The p and n regions are created by two oppositely biased, and closely spaced, gates in CMOS SOI technology. Using gates as the third terminal, the field effect diode can operate as a switch or as an amplifying element. In this paper, a conventional differential comparator is designed and its performance is compared with a circuit which uses field effect diodes in its output stage. It is shown that the large current sinking and supplying capability of the field effect diode causes this comparator to operate faster than the conventional circuit, consumes less power and covers less chip area.

Physics and Design of Nanoscale Field Effect Diodes for Memory and ESD Protection Applications

2013 ◽  
pp. 73-80
Author(s):  
D. E. Ioannou ◽  
Z. Chbili ◽  
A. Z. Badwan ◽  
Q. Li ◽  
Y. Yang ◽  
...  
Keyword(s):  
Field Effect ◽  
Esd Protection

Reliability challenge of ESD protection: From planner SOI MOSFET to SOI FinFET

2017 ◽  
Vol 31 (19-21) ◽  
pp. 1740004 ◽  
Author(s):  
Yibo Jiang ◽  
Hui Bi ◽  
Liangwei Dong ◽  
Qinglong Li
Keyword(s):  
Electrostatic Discharge ◽  
Silicon On Insulator ◽  
Heat Conductor ◽  
Soi Mosfet ◽  
Novel Device ◽  
Thermal Distribution ◽  
Floating Base ◽  
Esd Protection ◽  
Tcad Simulation ◽  
Soi Technology

Implementation of Electrostatic Discharge (ESD) protection in Silicon on Insulator (SOI) technology is a challenge because of the inherent properties of poor heat conductor and heat trapping. In this paper, a novel device as ESD clamp is proposed as Fix-Base SOI FinFET clamp which addresses the troublesome problem of floating base. Moreover, its manufacturing process is compatible to the normal SOI process flow well. Finally, a detailed discussion including current density and thermal distribution are presented with the technique of 3D TCAD simulation.

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