An automatic coefficient design methodology for high-order bandpass sigma-delta modulator with single-stage structure

2006 ◽  
Vol 53 (7) ◽  
pp. 580-584 ◽  
Author(s):  
Hwi-Ming Wang ◽  
Tai-Haur Kuo
Keyword(s):  
Design Methodology ◽  
Stage Structure ◽  
High Order ◽  
Single Stage ◽  
Sigma Delta Modulator ◽  
Sigma Delta

scholarly journals Implementation and Performance Evaluation of the Frequency-Domain-Based Bit Flipping Controller for Stabilizing the Single-Bit High-Order Interpolative Sigma Delta Modulators

2020 ◽  
Vol 10 (17) ◽  
pp. 5785
Author(s):  
Huishan Zhai ◽  
Bingo Wing-Kuen Ling
Keyword(s):  
Performance Evaluation ◽  
Frequency Domain ◽  
Control Strategy ◽  
Input Sequence ◽  
Logic Gates ◽  
High Order ◽  
Integer Programming Problem ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Resonance Frequencies

This paper is an extension of the existing works on the frequency-domain-based bit flipping control strategy for stabilizing the single-bit high-order interpolative sigma delta modulator. In particular, this paper proposes the implementation and performs the performance evaluation of the control strategy. For the implementation, a frequency detector is used to detect the resonance frequencies of the input sequence of the sigma delta modulator. Then, a neural-network-based controller is used for finding the solution of the integer programming problem. Finally, the buffers and the combinational logic gates as well as an inverter are used for implementing the proposed control strategy. For the performance evaluation, the stability region in terms of the input dynamical range is evaluated. It is found that the control strategy can significantly increase the input dynamical range from 0.24 to 0.58. Besides, the control strategy can be applied to a wider class of the input signals compared to the clipping method.

A High-Order Sigma-Delta Modulator Applied in Micro-Accelerometer

2014 ◽  
Vol 609-610 ◽  
pp. 1266-1270
Author(s):  
Jian Yang ◽  
Liang Liu ◽  
Qiu Ye Lv ◽  
Xiao Wei Liu ◽  
Liang Yin
Keyword(s):  
Noise Level ◽  
Signal To Noise Ratio ◽  
High Order ◽  
Signal Frequency ◽  
Cmos Process ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Ideal Situation ◽  
Micro Accelerometer ◽  
The Ideal

In this paper a high-order sigma-delta modulator applied in micro-accelerometer is designed. The modulator chooses the distributed feedback structure. And the signal bandwidth is 500Hz, the oversampling ratio is 250 and sampling frequency is 250KHz. By the MATLAB Simulink simulation, when the input signal is 1g, and the signal frequency is 250Hz, the simulation result is that the noise level is-160dBV at the signal frequency in the ideal situation. And when considering the non-ideal factors, the simulation result shows that the noise level at the input accelerated signal is 20dBV higher than the ideal. The overall circuit was implemented under 0.5 um CMOS process and simulated in Cadence Spectre. The final simulation results show that the signal to noise ratio (SNR) is 97.1dB.

An approach for stability analysis of a single-bit high-order digital sigma-delta modulator

2007 ◽  
Vol 17 (6) ◽  
pp. 1040-1054 ◽  
Author(s):  
Amin Z. Sadik ◽  
Zahir M. Hussain ◽  
Xinghuo Yu ◽  
Peter O'Shea
Keyword(s):  
Stability Analysis ◽  
High Order ◽  
Sigma Delta Modulator ◽  
Sigma Delta
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