A 0.67- $\mu\text{W}$ 177-ppm/°C All-MOS Current Reference Circuit in a 0.18- $\mu\text{m}$ CMOS Technology

2016 ◽  
Vol 63 (8) ◽  
pp. 723-727 ◽  
Author(s):  
Shailesh Singh Chouhan ◽  
Kari Halonen
2017 ◽  
Vol 2 (1) ◽  
pp. 1-4
Author(s):  
Dinesh Kushwaha ◽  
D. K. Mishra

This paper proposes a low voltage CMOS Nano power current reference circuit and presents its performance with circuit simulation in 180- nm UMC CMOS technology. The proposed circuit consists of start-up, Bias-voltage, current-source sub-circuits with most of the MOSFETs operating in sub-threshold region. Simulation results shows that the circuit generates a stable reference current of 4-nA in supply voltage range 1 V- 1.8 V with line sensitivity of 0.203%/V.The temperature coefficient of the current was 7592ppm/°C at 1.8 V in the range of 0°C-100°C. The power dissipation was 380 NW at 1.8 V Supply. The proposed circuit would be suitable for use in sub-threshold –operated power-aware large-scale integration


Author(s):  
Mark Arvie C. Aguinaga ◽  
Mervin T. Desengano ◽  
Kier Joshua M. Dimaunahan ◽  
Frince Aristotle M. Pinpin ◽  
Francis A. Malabanan ◽  
...  

2019 ◽  
Vol 47 (7) ◽  
pp. 991-1005
Author(s):  
Óscar Pereira‐Rial ◽  
Paula López ◽  
Juan M. Carrillo ◽  
Víctor M. Brea ◽  
Diego Cabello

2014 ◽  
Vol 61 (2) ◽  
pp. 967-974 ◽  
Author(s):  
Y. Piccin ◽  
H. Lapuyade ◽  
Y. Deval ◽  
C. Morche ◽  
J.-Y. Seyler ◽  
...  

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