Design of the Class-E Power Amplifier Considering the Temperature Effect of the Transistor On-Resistance for Sensor Applications

In this paper, we present a single-stage class-E power amplifier with multiple-gated shape as well as 0.18μm complementary metal-oxide-semiconductor (CMOS) process for 2.4GHz Industry-Science-Medicine (ISM) band. This power amplifier is able to be easily integrated into the system-on-chip (SoC) circuit. For the competition of lower cost and high integration in marketing concern, CMOS technology is fundamentally better than GaAs technology. We adopt the Advanced Design System software in circuit simulation coming from Agilent Company through the Chip Implementation Center (CIC) channel plus TSMC 0.18 μm device models. The simulation results with temperature effect, show the good performance such as an output power achievement of +22dBm under a 1.8V supply voltage; the power-added efficiency (PAE) is over 30%; the output impedance (S22) and the input impedance (S11) are fully lower than −15dB; the power gain (S21) is +11dB; the inverse isolation (S12) is below −26dB. This amplifier reaches its 1-dB compression point at an output level of 16.5dBm related to the input power 6.5dBm position. The output power with temperature variation from 0°C to 125°C depicts an acceptable spec. range, too.

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A High Efficiency Class-E Power Amplifier Over a Wide Power Range Using a Look-Up Table Based Dynamic Biasing Scheme

IEICE Transactions on Electronics ◽

10.1587/transele.e98.c.377 ◽

2015 ◽

Vol E98.C (4) ◽

pp. 377-379

Author(s):

Jonggyun LIM ◽

Wonshil KANG ◽

Kang-Yoon LEE ◽

Hyunchul KU

Keyword(s):

Power Amplifier ◽

High Efficiency ◽

Look Up Table ◽

Dynamic Biasing ◽

Class E

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A 3.5 GHz hybrid CMOS class E power amplifier with reverse body bias design for 5G applications

10.1063/5.0044534 ◽

2021 ◽

Author(s):

Ahmad Fariz Hasan ◽

Sohiful Anuar Zainol Murad ◽

Faizah Abu Bakar

Keyword(s):

Power Amplifier ◽

Hybrid Cmos ◽

Class E ◽

Body Bias

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Design of the Class-E Power Amplifier with Finite DC Feed Inductance under Maximum-Rating Constraints

Applied Sciences ◽

10.3390/app11093727 ◽

2021 ◽

Vol 11 (9) ◽

pp. 3727

Author(s):

Ingrid Casallas ◽

Carlos-Ivan Paez-Rueda ◽

Gabriel Perilla ◽

Manuel Pérez ◽

Arturo Fajardo

Keyword(s):

Quality Factor ◽

Power Amplifier ◽

Wide Spectrum ◽

Circuit Simulation ◽

Percentage Error ◽

Resonant Circuit ◽

Mean Square ◽

Peak Voltage ◽

Supply Current ◽

Class E

This paper proposes an analytical expression set to determine the maximum values of currents and voltages in the Class-E Power Amplifier (PA) with Finite DC-Feed Inductance (FDI) under the following assumptions—ideal components (e.g., inductors and capacitors with infinite quality factor), a switch with zero rise and fall commutation times, zero on-resistance, and infinite off-resistance, and an infinite loaded quality factor of the output resonant circuit. The developed expressions are the average supply current, the RMS (Root Mean Square) current through the DC-feed inductance, the peak voltage and current in the switch, the RMS current through the switch, the peak voltages of the output resonant circuit, and the peak voltage and current in the PA load. These equations were obtained from the circuit analysis of this ideal amplifier and curve-fitting tools. Furthermore, the proposed expressions are a useful tool to estimate the maximum ratings of the amplifier components. The accuracy of the expressions was analyzed by the circuit simulation of twelve ideal amplifiers, which were designed to meet a wide spectrum of application scenarios. The resulting Mean Absolute Percentage Error (MAPE) of the maximum-rating constraints estimation was 2.64%.

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