Investigations on Line-Edge Roughness (LER) and Line-Width Roughness (LWR) in Nanoscale CMOS Technology: Part I–Modeling and Simulation Method

2013 ◽  
Vol 60 (11) ◽  
pp. 3669-3675 ◽  
Author(s):  
Xiaobo Jiang ◽  
Runsheng Wang ◽  
Tao Yu ◽  
Jiang Chen ◽  
Ru Huang
2010 ◽  
Vol 46 (10) ◽  
pp. 1988-1999 ◽  
Author(s):  
G.P. Patsis ◽  
D. Drygiannakis ◽  
V. Constantoudis ◽  
I. Raptis ◽  
E. Gogolides

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